[llvm] Add more cases for computeOverflowForSignedAdd (PR #99900)

via llvm-commits llvm-commits at lists.llvm.org
Sat Jul 27 16:18:30 PDT 2024


https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/99900

>From 1c005c4f5d7ce4bb4b3ad843b1ef69a9bae703b5 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Mon, 22 Jul 2024 12:39:08 -0400
Subject: [PATCH] Add more cases for computeOverflowForSignedAdd for
 ValueTracking

Even with fwrapv, IR knows this does not wrap:

https://alive2.llvm.org/ce/z/jsbr78
---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index bbc44a4716405..8707a0658e8ec 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4243,8 +4243,21 @@ SelectionDAG::computeOverflowForSignedAdd(SDValue N0, SDValue N1) const {
   if (ComputeNumSignBits(N0) > 1 && ComputeNumSignBits(N1) > 1)
     return OFK_Never;
 
-  // TODO: Add ConstantRange::signedAddMayOverflow handling.
-  return OFK_Sometime;
+  // smulhi + any value never overflow
+  KnownBits N1Known = computeKnownBits(N1);
+  if (N0.getOpcode() == ISD::SMUL_LOHI && N0.getResNo() == 1 &&
+      N1Known.getMaxValue().ult(2))
+    return OFK_Never;
+
+  KnownBits N0Known = computeKnownBits(N0);
+  if (N1.getOpcode() == ISD::SMUL_LOHI && N1.getResNo() == 1 &&
+      N0Known.getMaxValue().ult(2))
+    return OFK_Never;
+  
+  // Fallback to ConstantRange::signedAddMayOverflow handling.
+  ConstantRange N0Range = ConstantRange::fromKnownBits(N0Known, true);
+  ConstantRange N1Range = ConstantRange::fromKnownBits(N1Known, true);
+  return mapOverflowResult(N0Range.signedAddMayOverflow(N1Range));
 }
 
 SelectionDAG::OverflowKind



More information about the llvm-commits mailing list