[llvm] [AMDGPU] Always lower s/udiv64 by constant to MUL (PR #100723)

[Pierre van Houtryve via llvm-commits]

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@@ -6405,7 +6405,8 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
     if (VT.isVector())
       WideVT = EVT::getVectorVT(*DAG.getContext(), WideVT,
                                 VT.getVectorElementCount());
-    if (isOperationLegalOrCustom(ISD::MUL, WideVT)) {
+    if (isOperationLegalOrCustom(ISD::MUL, WideVT) ||
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Pierre-vh wrote:

Sure, I can update the tests, but we still need some kind of legality check, otherwise we get crashes in a few places. RISCV seems especially sensitive to that and there's a few crashes I can't seem to get rid of without getting rid of the AMDGPU improvements.

Why is the TLI hook not desirable? We already have some for other expansions. 
I could make an enum instead to decide which expansion method to use, and targets would default to a legal method while AMDGPU can force MUL expansion.


https://github.com/llvm/llvm-project/pull/100723