[llvm] [DAG] Support saturated truncate (PR #99418)

[David Green via llvm-commits]

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@@ -1410,6 +1410,12 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     }
   }
 
+  for (MVT VT : {MVT::v8i16, MVT::v4i32}) {
+    setOperationAction(ISD::TRUNCATE_SSAT_S, VT, Custom);
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davemgreen wrote:

If this uses isTypeDesirableForOp to only generate the truncates of the expected size, then these can be legal as opposed to custom. (If they were custom then there would need to be something in LowerOperation to handle them).

https://github.com/llvm/llvm-project/pull/99418