[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 25 22:25:01 PDT 2024


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@@ -59,16 +59,26 @@ let TargetPrefix = "riscv" in {
                             [IntrNoMem, IntrWillReturn, IntrSpeculatable,
                             ImmArg<ArgIndex<1>>, ImmArg<ArgIndex<2>>]>;
 
+  def int_riscv_cv_alu_slet  : ScalarCoreVAluGprGprIntrinsic;
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topperc wrote:

Why do we need builtins or intrinsics for slet? We don't have builtins for slt/sltu.

https://github.com/llvm/llvm-project/pull/100684


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