[llvm] [RISCV][TTI] Properly model odd vector sized LD/ST operations (PR #100436)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 25 12:05:42 PDT 2024
================
@@ -67,23 +65,23 @@ define void @small_trip_count_min_vlen_32(ptr nocapture %a) nounwind vscale_rang
; CHECK: vector.ph:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[TMP0]], 4
-; CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[TMP1]], 1
-; CHECK-NEXT: [[N_RND_UP:%.*]] = add i32 4, [[TMP4]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], 1
----------------
topperc wrote:
Is the script just doing renames here?
https://github.com/llvm/llvm-project/pull/100436
More information about the llvm-commits
mailing list