[llvm] [RISCV] Move exact VLEN VLMAX transform to RISCVVectorPeephole (PR #100551)

[Luke Lau via llvm-commits]

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@@ -76,13 +78,44 @@ char RISCVVectorPeephole::ID = 0;
 INITIALIZE_PASS(RISCVVectorPeephole, DEBUG_TYPE, "RISC-V Fold Masks", false,
                 false)
 
-// If an AVL is a VLENB that's possibly scaled to be equal to VLMAX, convert it
-// to the VLMAX sentinel value.
+/// Check if an operand is an immediate or a materialized ADDI $x0, imm.
+std::optional<unsigned>
+RISCVVectorPeephole::getConstant(const MachineOperand &VL) const {
+  if (VL.isImm())
+    return VL.getImm();
+
+  MachineInstr *Def = MRI->getVRegDef(VL.getReg());
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lukel97 wrote:

It should only be an immediate or a register, and the immediate case is handled above. If it's a register it can also be implicit_def, but I think getVRegDef will handle just return null in that case.

https://github.com/llvm/llvm-project/pull/100551