[llvm] TTI: Fix special casing vectorization costs of saturating add/sub (PR #97463)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> The `llvm.sadd.sat.i64` Arm costs are a bit odd - I assume because `getTypeLegalizationCost(i64)` will be `{2, i32}`, and it uses the `LT.first * 2` as the `i32` is legal. The other results seem OK but that one doesn't sound right for this operation. I could add an override in the Arm backend if you think that is the best way forward - the other results look better, including the SVE versions that we don't currently have tests for.

What do you mean by odd? They went down, but you seem to be saying they are too large?

https://github.com/llvm/llvm-project/pull/97463