[clang] [llvm] [RISCV][FMV] Support target_clones (PR #85786)

[Piyou Chen via llvm-commits]

BeMg wrote:

> @BeMg Can you rebase over commit [d1e28e2](https://github.com/llvm/llvm-project/commit/d1e28e2a7bd4642e6a5ec963a5ca2ad2ba1b2b59)?

Now this patch rebase over https://github.com/llvm/llvm-project/commit/d1e28e2a7bd4642e6a5ec963a5ca2ad2ba1b2b59.

Majorly, the diff between origin patch are:

1. Use the getRISCVFeaturesBitPosition function introduced in https://github.com/llvm/llvm-project/commit/d1e28e2a7bd4642e6a5ec963a5ca2ad2ba1b2b59 in another version `EmitRISCVCpuSupports`.
2. Extract the common part of `EmitRISCVCpuSupports` and create a helper function for it.
3. Remove the __riscv_feature_bits.length check.
4. During the target_clones Sema check, reuse the getRISCVFeaturesBitPosition function to validate the feature.

https://github.com/llvm/llvm-project/pull/85786