[llvm] [RISCV][CFI] Emit cfi_offset for every callee-saved vector registers (PR #100455)

[Craig Topper via llvm-commits]

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@@ -1554,12 +1583,15 @@ void RISCVFrameLowering::emitCalleeSavedRVVPrologCFI(
     // Insert the spill to the stack frame.
     int FI = CS.getFrameIdx();
     if (FI >= 0 && MFI.getStackID(FI) == TargetStackID::ScalableVector) {
-      unsigned CFIIndex = MF->addFrameInst(
-          createDefCFAOffset(*STI.getRegisterInfo(), CS.getReg(), -FixedSize,
-                             MFI.getObjectOffset(FI) / 8));
-      BuildMI(MBB, MI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
-          .addCFIIndex(CFIIndex)
-          .setMIFlag(MachineInstr::FrameSetup);
+      auto VRegLMULPair = getCSBaseVRegLMULPair(CS.getReg());
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topperc wrote:

Can we use TRI->getSubReg with `RISCV::sub_vrm1_0` find the starting register?

Can we get the LMUL by checking calling `contains` on the 4 possible vector register classes?

https://github.com/llvm/llvm-project/pull/100455