[llvm] b1f263e - [llvm][MachineLICM] Fix a comment typo. NFC

Jon Roelofs via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 24 13:03:59 PDT 2024


Author: Jon Roelofs
Date: 2024-07-24T13:03:46-07:00
New Revision: b1f263e4c2466a693609a3930f53b9887be67b5b

URL: https://github.com/llvm/llvm-project/commit/b1f263e4c2466a693609a3930f53b9887be67b5b
DIFF: https://github.com/llvm/llvm-project/commit/b1f263e4c2466a693609a3930f53b9887be67b5b.diff

LOG: [llvm][MachineLICM] Fix a comment typo. NFC

Added: 
    

Modified: 
    llvm/lib/CodeGen/MachineLICM.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index f24ab187ef400..d75df2adc440d 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -476,7 +476,7 @@ static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo &TRI,
   RUs |= RUsFromRegsNotInMask;
 }
 
-/// Examine the instruction for potentai LICM candidate. Also
+/// Examine the instruction for potential LICM candidate. Also
 /// gather register def and frame object update information.
 void MachineLICMBase::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
                                 BitVector &RUClobbers,


        


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