[llvm] [AMDGPU] Correctly insert s_nops for implicit read of SDWA (PR #100276)

[Jeffrey Byrnes via llvm-commits]

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@@ -935,6 +935,30 @@ int GCNHazardRecognizer::checkVALUHazards(MachineInstr *VALU) {
           if (Use.isReg() && TRI->regsOverlap(Def, Use.getReg()))
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jrbyrnes wrote:

In the past, I have seen us use implicit regs on ops where they don't actually read those regs (rather they're use for modelling liveness in some way, MI100 indirect copy to AGPR handling comes to mind). I assume we don't do this / plan on doing this for MI300 (at least for VALUs)? 

https://github.com/llvm/llvm-project/pull/100276