[llvm] [AMDGPU] Mitigate GFX12 VALU read SGPR hazard (PR #100067)

[Carl Ritson via llvm-commits]

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@@ -2759,6 +2762,36 @@ bool GCNHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
   return false;
 }
 
+// Adjust global offsets for instructions bundled with S_GETPC_B64 after
+// insertion of a new instruction.
+static void updateGetPCBundle(MachineInstr *NewMI) {
+  if (!NewMI->isBundled())
+    return;
+
+  // Find start of bundle.
+  auto I = NewMI->getIterator();
+  while (I->isBundledWithPred())
+    I--;
+  if (I->isBundle())
+    I++;
+
+  // Bail if this is not an S_GETPC bundle.
+  if (I->getOpcode() != AMDGPU::S_GETPC_B64)
+    return;
+
+  // Update offsets of any references in the bundle.
+  const unsigned NewBytes = NewMI->getDesc().getSize();
+  auto NextMI = std::next(NewMI->getIterator());
+  auto End = NewMI->getParent()->end();
+  while (NextMI != End && NextMI->isBundledWithPred()) {
+    for (auto &Operand : NextMI->operands()) {
+      if (Operand.isGlobal())
+        Operand.setOffset(Operand.getOffset() + NewBytes);
+    }
+    NextMI++;
+  }
----------------
perlfu wrote:

This is only really intended to be used with fixed size SALU operations, i.e. S_WAIT_ALU.
I can substitute `NewMI->getDesc().getSize()` with 4, and add an assertion if that is preferable.
Not sure what to tell you otherwise, this is how PC relative references look at this point in the compiler, where part of the values will be completed during linking.

https://github.com/llvm/llvm-project/pull/100067