[llvm] [llvm][CodeGen] respect booleanVectorContents while UnrollVSETCC (PR #97589)

[Yingchi Long via llvm-commits]

https://github.com/inclyc updated https://github.com/llvm/llvm-project/pull/97589

>From a54187d1f2e50af4926b892a8dc8c0422b181acb Mon Sep 17 00:00:00 2001
From: Yingchi Long <i at lyc.dev>
Date: Wed, 3 Jul 2024 22:55:49 +0800
Subject: [PATCH 1/4] [llvm][CodeGen] respect booleanVectorContents while
 UnrollVSETCC (NFC)

This is an NFC change that focus fixing correctness of UnrollVSETCC.
For historical reason this function assumes all targets setBooleanVectorContents to "ZeroOrNegativeOneBooleanContent".
i.e. vector boolean values are "-1".

However this is not true for some targets, e.g. RISC-V, Sparc, VE, XCore, ARC...

Actually all these targets support native vector comparison.
Thus it is no need to invoke this function and it is not coveraged by any test cases.

I'm not sure whether or not it is OK to submit such patch,
but this does indeed fix potential miscompilation for furthur targets.
---
 llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 14b147cc5b01b..8b6fad684ba86 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -2016,7 +2016,8 @@ SDValue VectorLegalizer::UnrollVSETCC(SDNode *Node) {
                          TLI.getSetCCResultType(DAG.getDataLayout(),
                                                 *DAG.getContext(), TmpEltVT),
                          LHSElem, RHSElem, CC);
-    Ops[i] = DAG.getSelect(dl, EltVT, Ops[i], DAG.getAllOnesConstant(dl, EltVT),
+    Ops[i] = DAG.getSelect(dl, EltVT, Ops[i],
+                           DAG.getBoolConstant(true, dl, EltVT, VT),
                            DAG.getConstant(0, dl, EltVT));
   }
   return DAG.getBuildVector(VT, dl, Ops);

>From e2d2d09af5b264e514253221d682a32b2770a28d Mon Sep 17 00:00:00 2001
From: Yingchi Long <i at lyc.dev>
Date: Wed, 3 Jul 2024 23:24:45 +0800
Subject: [PATCH 2/4] fixup EltVt

---
 llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 8b6fad684ba86..055711653ce6c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -2017,7 +2017,7 @@ SDValue VectorLegalizer::UnrollVSETCC(SDNode *Node) {
                                                 *DAG.getContext(), TmpEltVT),
                          LHSElem, RHSElem, CC);
     Ops[i] = DAG.getSelect(dl, EltVT, Ops[i],
-                           DAG.getBoolConstant(true, dl, EltVT, VT),
+                           DAG.getBoolConstant(true, dl, EltVT, EltVT),
                            DAG.getConstant(0, dl, EltVT));
   }
   return DAG.getBuildVector(VT, dl, Ops);

>From 20bb06845ae011e77236295c63ca61eb504a5ec3 Mon Sep 17 00:00:00 2001
From: Yingchi Long <i at lyc.dev>
Date: Wed, 3 Jul 2024 23:33:52 +0800
Subject: [PATCH 3/4] Revert "fixup EltVt"

This reverts commit e2d2d09af5b264e514253221d682a32b2770a28d.
---
 llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 055711653ce6c..8b6fad684ba86 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -2017,7 +2017,7 @@ SDValue VectorLegalizer::UnrollVSETCC(SDNode *Node) {
                                                 *DAG.getContext(), TmpEltVT),
                          LHSElem, RHSElem, CC);
     Ops[i] = DAG.getSelect(dl, EltVT, Ops[i],
-                           DAG.getBoolConstant(true, dl, EltVT, EltVT),
+                           DAG.getBoolConstant(true, dl, EltVT, VT),
                            DAG.getConstant(0, dl, EltVT));
   }
   return DAG.getBuildVector(VT, dl, Ops);

>From b07dae6beee934dc6a0080c5e28cb48db5a7e7a5 Mon Sep 17 00:00:00 2001
From: Yingchi Long <i at lyc.dev>
Date: Wed, 24 Jul 2024 14:50:07 +0800
Subject: [PATCH 4/4] address comments from @RKSimon

---
 llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 8b6fad684ba86..3bf42e32d7330 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -2012,13 +2012,8 @@ SDValue VectorLegalizer::UnrollVSETCC(SDNode *Node) {
                                   DAG.getVectorIdxConstant(i, dl));
     SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
                                   DAG.getVectorIdxConstant(i, dl));
-    Ops[i] = DAG.getNode(ISD::SETCC, dl,
-                         TLI.getSetCCResultType(DAG.getDataLayout(),
-                                                *DAG.getContext(), TmpEltVT),
-                         LHSElem, RHSElem, CC);
-    Ops[i] = DAG.getSelect(dl, EltVT, Ops[i],
-                           DAG.getBoolConstant(true, dl, EltVT, VT),
-                           DAG.getConstant(0, dl, EltVT));
+    Ops[i] = DAG.getNode(ISD::SETCC, dl, MVT::i1, LHSElem, RHSElem, CC);
+    Ops[i] = DAG.getBoolExtOrTrunc(Ops[i], dl, EltVT, VT);
   }
   return DAG.getBuildVector(VT, dl, Ops);
 }