[llvm] [RISCV] Emit VP strided loads/stores in RISCVGatherScatterLowering (PR #98111)
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 23 23:35:05 PDT 2024
lukel97 wrote:
On second thought though this does remove the @llvm.riscv.masked.strided.load and @llvm.riscv.masked.strided.store intrinsics which is breaking. Maybe there's an argument for backporting so we don't have people using them in the meantime.
https://github.com/llvm/llvm-project/pull/98111
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