[llvm] [AMDGPU] Improve DPP combining for fadd (PR #100148)

[Matt Arsenault via llvm-commits]

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@@ -478,6 +478,16 @@ static bool isIdentityValue(unsigned OrigMIOp, MachineOperand *OldOpnd) {
     if (OldOpnd->getImm() == 1)
       return true;
     break;
+  case AMDGPU::V_ADD_F32_e32:
+  case AMDGPU::V_ADD_F32_e64:
+    // -0.0 is an identity for fadd.
+    if (static_cast<uint32_t>(OldOpnd->getImm()) == 0x80000000)
+      return true;
+    // +0.0 is an identity for fadd except for the sign of a zero result.
+    if (MI.getFlag(MachineInstr::FmNsz) &&
+        static_cast<uint32_t>(OldOpnd->getImm()) == 0)
+      return true;
+    break;
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arsenm wrote:

Should this handle the v2f16/f16 cases? 

Can we handle fsub in a follow up too? 

https://github.com/llvm/llvm-project/pull/100148