[llvm] [SDAG] Read-only intrinsics must have WillReturn attribute to be treated as loads (PR #99999)

[Kevin McAfee via llvm-commits]

https://github.com/kalxr created https://github.com/llvm/llvm-project/pull/99999

This change avoids deleting `!willReturn` intrinsics for which the return value is unused when building the SDAG. Currently, calls to read-only intrinsics not marked with `IntrWillReturn` cannot deleted at the LLVM IR level but may be deleted when building the SDAG. This appears incorrect. These calls are unsafe to remove from the IR because the functions are `!willReturn` and should also be unsafe to remove from the SDAG for the same reason. This change aligns the behavior of the SDAG to that of LLVM IR.

Additionally, update tests where instruction order changed slightly as a result of this change.

>From ca7e38e5a08b50d558bc33176626dc82a8cf1a37 Mon Sep 17 00:00:00 2001
From: Kevin McAfee <kmcafee at nvidia.com>
Date: Mon, 22 Jul 2024 15:53:56 -0700
Subject: [PATCH 1/2] [SDAG] Read-only intrinsics must have WillReturn to be
 treated as loads

---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 37b1131d2f8a3..29e6466b12cde 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5227,7 +5227,7 @@ void SelectionDAGBuilder::visitTargetIntrinsic(const CallInst &I,
   // definition.
   const Function *F = I.getCalledFunction();
   bool HasChain = !F->doesNotAccessMemory();
-  bool OnlyLoad = HasChain && F->onlyReadsMemory();
+  bool OnlyLoad = HasChain && F->onlyReadsMemory() && F->willReturn();
 
   // Build the operand list.
   SmallVector<SDValue, 8> Ops;

>From 7e5426a4c82e35a5a2433bf07b79899da4289117 Mon Sep 17 00:00:00 2001
From: Kevin McAfee <kmcafee at nvidia.com>
Date: Mon, 22 Jul 2024 16:00:46 -0700
Subject: [PATCH 2/2] Update BPF test instruction order

---
 llvm/test/CodeGen/BPF/intrinsics.ll         | 8 ++++----
 llvm/test/CodeGen/BPF/objdump_intrinsics.ll | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/llvm/test/CodeGen/BPF/intrinsics.ll b/llvm/test/CodeGen/BPF/intrinsics.ll
index 0f59fd5604732..8331ee5ff04ee 100644
--- a/llvm/test/CodeGen/BPF/intrinsics.ll
+++ b/llvm/test/CodeGen/BPF/intrinsics.ll
@@ -31,10 +31,10 @@ define i32 @ld_h(ptr %ctx, ptr %ctx2, i32 %foo) #0 {
   %5 = trunc i64 %4 to i32
   ret i32 %5
 ; CHECK-LABEL: ld_h:
-; CHECK-EL: r0 = *(u16 *)skb[r
 ; CHECK-EL: r0 = *(u16 *)skb[123]
-; CHECK-EB: r0 = *(u16 *)skb[r
+; CHECK-EL: r0 = *(u16 *)skb[r
 ; CHECK-EB: r0 = *(u16 *)skb[123]
+; CHECK-EB: r0 = *(u16 *)skb[r
 }
 
 declare i64 @llvm.bpf.load.half(ptr, i64) #1
@@ -48,10 +48,10 @@ define i32 @ld_w(ptr %ctx, ptr %ctx2, i32 %foo) #0 {
   %5 = trunc i64 %4 to i32
   ret i32 %5
 ; CHECK-LABEL: ld_w:
-; CHECK-EL: r0 = *(u32 *)skb[r
 ; CHECK-EL: r0 = *(u32 *)skb[123]
-; CHECK-EB: r0 = *(u32 *)skb[r
+; CHECK-EL: r0 = *(u32 *)skb[r
 ; CHECK-EB: r0 = *(u32 *)skb[123]
+; CHECK-EB: r0 = *(u32 *)skb[r
 }
 
 declare i64 @llvm.bpf.load.word(ptr, i64) #1
diff --git a/llvm/test/CodeGen/BPF/objdump_intrinsics.ll b/llvm/test/CodeGen/BPF/objdump_intrinsics.ll
index 92db0882398b6..5497fce989d21 100644
--- a/llvm/test/CodeGen/BPF/objdump_intrinsics.ll
+++ b/llvm/test/CodeGen/BPF/objdump_intrinsics.ll
@@ -31,10 +31,10 @@ define i32 @ld_h(ptr %ctx, ptr %ctx2, i32 %foo) #0 {
   %5 = trunc i64 %4 to i32
   ret i32 %5
 ; CHECK-LABEL: ld_h:
-; CHECK-EL: r0 = *(u16 *)skb[r
 ; CHECK-EL: r0 = *(u16 *)skb[123]
-; CHECK-EB: r0 = *(u16 *)skb[r
+; CHECK-EL: r0 = *(u16 *)skb[r
 ; CHECK-EB: r0 = *(u16 *)skb[123]
+; CHECK-EB: r0 = *(u16 *)skb[r
 }
 
 declare i64 @llvm.bpf.load.half(ptr, i64) #1
@@ -48,10 +48,10 @@ define i32 @ld_w(ptr %ctx, ptr %ctx2, i32 %foo) #0 {
   %5 = trunc i64 %4 to i32
   ret i32 %5
 ; CHECK-LABEL: ld_w:
-; CHECK-EL: r0 = *(u32 *)skb[r
 ; CHECK-EL: r0 = *(u32 *)skb[123]
-; CHECK-EB: r0 = *(u32 *)skb[r
+; CHECK-EL: r0 = *(u32 *)skb[r
 ; CHECK-EB: r0 = *(u32 *)skb[123]
+; CHECK-EB: r0 = *(u32 *)skb[r
 }
 
 declare i64 @llvm.bpf.load.word(ptr, i64) #1