[llvm] [GISel][TableGen] Generate getRegBankFromRegClass (PR #99896)

Kai Nacke via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 22 11:26:32 PDT 2024


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@@ -0,0 +1,176 @@
+/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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redstar wrote:

For sure, that was just to show the generated code as requested above.

https://github.com/llvm/llvm-project/pull/99896


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