[llvm] [AMDGPU] Fix build failure in raw.atomic.buffer.load tests (PR #99912)
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llvm-commits at lists.llvm.org
Mon Jul 22 11:20:28 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Jessica Del (OutOfCache)
<details>
<summary>Changes</summary>
This fixes the failing tests due to different
register numbers.
---
Full diff: https://github.com/llvm/llvm-project/pull/99912.diff
2 Files Affected:
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll (+20-11)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll (+20-11)
``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
index 03f94d6e853f0..419e19083f85e 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
@@ -5,7 +5,8 @@
define amdgpu_kernel void @raw_atomic_buffer_load_i32(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_i32:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB0_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -33,7 +34,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_i32_off(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_i32_off:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB1_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -60,7 +62,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_i32_soff(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_i32_soff:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB2_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -87,7 +90,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_i32_dlc(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_i32_dlc:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB3_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -115,7 +119,8 @@ bb2:
define amdgpu_kernel void @raw_nonatomic_buffer_load_i32(<4 x i32> %addr) {
; CHECK-LABEL: raw_nonatomic_buffer_load_i32:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: buffer_load_b32 v1, off, s[0:3], 0 offset:4 glc
; CHECK-NEXT: s_mov_b32 s0, 0
@@ -144,8 +149,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_i64(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_i64:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
-; CHECK-NEXT: v_mov_b32_e32 v1, 0
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB5_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -174,7 +179,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_v2i16(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_v2i16:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB6_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -203,7 +209,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_v4i16(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_v4i16:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB7_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -236,7 +243,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_v4i32(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_v4i32:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB8_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -265,7 +273,8 @@ bb2:
define amdgpu_kernel void @raw_atomic_buffer_load_ptr(<4 x i32> %addr) {
; CHECK-LABEL: raw_atomic_buffer_load_ptr:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB9_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
index 3228335073d07..6541ac9553231 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
@@ -5,7 +5,8 @@
define amdgpu_kernel void @raw_ptr_atomic_buffer_ptr_load_i32(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_ptr_load_i32:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB0_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -33,7 +34,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_off(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i32_off:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB1_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -60,7 +62,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_soff(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i32_soff:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB2_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -87,7 +90,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i32_dlc(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i32_dlc:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB3_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -115,7 +119,8 @@ bb2:
define amdgpu_kernel void @raw_nonptr_atomic_buffer_load_i32(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_nonptr_atomic_buffer_load_i32:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: buffer_load_b32 v1, off, s[0:3], 0 offset:4 glc
; CHECK-NEXT: s_mov_b32 s0, 0
@@ -144,8 +149,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_i64(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_i64:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
-; CHECK-NEXT: v_mov_b32_e32 v1, 0
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB5_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -174,7 +179,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v2i16(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_v2i16:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB6_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -203,7 +209,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i16(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_v4i16:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB7_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -236,7 +243,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i32(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_v4i32:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB8_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
@@ -265,7 +273,8 @@ bb2:
define amdgpu_kernel void @raw_ptr_atomic_buffer_load_ptr(ptr addrspace(8) %ptr) {
; CHECK-LABEL: raw_ptr_atomic_buffer_load_ptr:
; CHECK: ; %bb.0: ; %bb
-; CHECK-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
+; CHECK-NEXT: s_load_b128 s[0:3], s[2:3], 0x24
+; CHECK-NEXT: v_and_b32_e32 v0, 0x3ff, v0
; CHECK-NEXT: s_mov_b32 s4, 0
; CHECK-NEXT: .LBB9_1: ; %bb1
; CHECK-NEXT: ; =>This Inner Loop Header: Depth=1
``````````
</details>
https://github.com/llvm/llvm-project/pull/99912
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