[llvm] 0950533 - [RISCV] Move call to EmitLoweredCascadedSelect above some variable declarations. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 22 10:48:28 PDT 2024
Author: Craig Topper
Date: 2024-07-22T10:37:45-07:00
New Revision: 0950533cff55478af0eb802c3698ff5a4e94bb73
URL: https://github.com/llvm/llvm-project/commit/0950533cff55478af0eb802c3698ff5a4e94bb73
DIFF: https://github.com/llvm/llvm-project/commit/0950533cff55478af0eb802c3698ff5a4e94bb73.diff
LOG: [RISCV] Move call to EmitLoweredCascadedSelect above some variable declarations. NFC
These variables aren't used if we call EmitLoweredCascadedSelect
so move the call above them.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 12d0e1d6ccb48..823fb428472ef 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -18418,6 +18418,15 @@ static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI,
// Select_FPRX_ (rs1, rs2, imm, rs4, (Select_FPRX_ rs1, rs2, imm, rs4, rs5))
// is checked here and handled by a separate function -
// EmitLoweredCascadedSelect.
+
+ auto Next = next_nodbg(MI.getIterator(), BB->instr_end());
+ if ((MI.getOpcode() != RISCV::Select_GPR_Using_CC_GPR &&
+ MI.getOpcode() != RISCV::Select_GPR_Using_CC_Imm) &&
+ Next != BB->end() && Next->getOpcode() == MI.getOpcode() &&
+ Next->getOperand(5).getReg() == MI.getOperand(0).getReg() &&
+ Next->getOperand(5).isKill())
+ return EmitLoweredCascadedSelect(MI, *Next, BB, Subtarget);
+
Register LHS = MI.getOperand(1).getReg();
Register RHS;
if (MI.getOperand(2).isReg())
@@ -18429,15 +18438,6 @@ static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI,
SelectDests.insert(MI.getOperand(0).getReg());
MachineInstr *LastSelectPseudo = &MI;
- auto Next = next_nodbg(MI.getIterator(), BB->instr_end());
- if ((MI.getOpcode() != RISCV::Select_GPR_Using_CC_GPR &&
- MI.getOpcode() != RISCV::Select_GPR_Using_CC_Imm) &&
- Next != BB->end() && Next->getOpcode() == MI.getOpcode() &&
- Next->getOperand(5).getReg() == MI.getOperand(0).getReg() &&
- Next->getOperand(5).isKill()) {
- return EmitLoweredCascadedSelect(MI, *Next, BB, Subtarget);
- }
-
for (auto E = BB->end(), SequenceMBBI = MachineBasicBlock::iterator(MI);
SequenceMBBI != E; ++SequenceMBBI) {
if (SequenceMBBI->isDebugInstr())
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