[llvm] [AArch64] Use isKnownNonZero to optimize eligible compares to cmn and ccmn (PR #96349)

[David Green via llvm-commits]

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@@ -3566,13 +3574,21 @@ static SDValue emitConditionalComparison(SDValue LHS, SDValue RHS,
       Opcode = AArch64ISD::CCMN;
       RHS = DAG.getConstant(Imm.abs(), DL, Const->getValueType(0));
     }
-  } else if (RHS.getOpcode() == ISD::SUB) {
-    SDValue SubOp0 = RHS.getOperand(0);
-    if (isNullConstant(SubOp0) && (CC == ISD::SETEQ || CC == ISD::SETNE)) {
-      // See emitComparison() on why we can only do this for SETEQ and SETNE.
-      Opcode = AArch64ISD::CCMN;
-      RHS = RHS.getOperand(1);
-    }
+  } else if (isCMN(RHS, CC, DAG)) {
+    Opcode = AArch64ISD::CCMN;
+    RHS = RHS.getOperand(1);
+  } else if (isCMN(LHS, CC, DAG) &&
+             (isIntEqualitySetCC(CC) ||
+              (isUnsignedIntSetCC(CC) && DAG.isKnownNeverZero(RHS)) ||
+              (isSignedIntSetCC(CC) && cannotBeIntMin(RHS, DAG)))) {
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davemgreen wrote:

This has changed gain, is that to help extra cases? It now says that it is valid so long as both the LHS and RHS have the required known bits? Do you have some proof to help explain that?

https://github.com/llvm/llvm-project/pull/96349