[llvm] [AArch64] Fix lowring error for masked load/store integer scalable ve… (PR #99354)

[Sander de Smalen via llvm-commits]

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@@ -6912,32 +6911,30 @@ SDValue DAGTypeLegalizer::WidenVecOp_MSTORE(SDNode *N, unsigned OpNo) {
   SDValue Mask = MST->getMask();
   EVT MaskVT = Mask.getValueType();
   SDValue StVal = MST->getValue();
+  EVT VT = StVal.getValueType();
   SDLoc dl(N);
 
   if (OpNo == 1) {
     // Widen the value.
     StVal = GetWidenedVector(StVal);
-
-    // The mask should be widened as well.
+    // The mask should be widened as well
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sdesmalen-arm wrote:

nit unnecessary whitespace change. please revert to what it was.

https://github.com/llvm/llvm-project/pull/99354