[llvm] CodeGen: Avoid some references to MachineFunction's getMMI (PR #99652)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 19 07:12:07 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
MachineFunction's probably should not include a backreference to
the owning MachineModuleInfo. Most of these references were used
just to query the MCContext, which MachineFunction already directly
stores. Other contexts are using it to query the LLVMContext, which
can already be accessed through the IR function reference.
---
Patch is 25.81 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/99652.diff
27 Files Affected:
- (modified) llvm/include/llvm/CodeGen/TailDuplicator.h (-1)
- (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+1-2)
- (modified) llvm/lib/CodeGen/MachineInstr.cpp (+1-1)
- (modified) llvm/lib/CodeGen/RegAllocBase.cpp (+1-1)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+7-11)
- (modified) llvm/lib/CodeGen/TailDuplicator.cpp (-1)
- (modified) llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp (+1-1)
- (modified) llvm/lib/Target/AArch64/AArch64PointerAuth.cpp (+1-1)
- (modified) llvm/lib/Target/ARC/ARCFrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/ARM/ARMFrameLowering.cpp (+2-4)
- (modified) llvm/lib/Target/ARM/Thumb1FrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/M68k/M68kFrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/MSP430/MSP430FrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/Mips/Mips16FrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/Mips/MipsSEFrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/PowerPC/PPCFrameLowering.cpp (+2-4)
- (modified) llvm/lib/Target/PowerPC/PPCISelLowering.cpp (+1-1)
- (modified) llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp (+1-1)
- (modified) llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp (+2-4)
- (modified) llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp (+1-1)
- (modified) llvm/lib/Target/X86/X86FrameLowering.cpp (+3-6)
- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+4-5)
- (modified) llvm/lib/Target/X86/X86ISelLoweringCall.cpp (+1-1)
- (modified) llvm/lib/Target/X86/X86PreTileConfig.cpp (+1-1)
- (modified) llvm/lib/Target/XCore/XCoreFrameLowering.cpp (+1-2)
- (modified) llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp (+1-2)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/TailDuplicator.h b/llvm/include/llvm/CodeGen/TailDuplicator.h
index 8fdce301c0ccb..8b1f67c416c22 100644
--- a/llvm/include/llvm/CodeGen/TailDuplicator.h
+++ b/llvm/include/llvm/CodeGen/TailDuplicator.h
@@ -40,7 +40,6 @@ class TailDuplicator {
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
const MachineBranchProbabilityInfo *MBPI;
- const MachineModuleInfo *MMI;
MachineRegisterInfo *MRI;
MachineFunction *MF;
MBFIWrapper *MBFI;
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 40a691af22748..68a8a273a1b47 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -2451,8 +2451,7 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
int FI = getOrCreateFrameIndex(*cast<AllocaInst>(Arg));
MCSymbol *FrameAllocSym =
- MF->getMMI().getContext().getOrCreateFrameAllocSymbol(EscapedName,
- Idx);
+ MF->getContext().getOrCreateFrameAllocSymbol(EscapedName, Idx);
// This should be inserted at the start of the entry block.
auto LocalEscape =
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 2b083e1dc3210..be64e9c8452f6 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -2216,7 +2216,7 @@ void MachineInstr::emitError(StringRef Msg) const {
if (const MachineBasicBlock *MBB = getParent())
if (const MachineFunction *MF = MBB->getParent())
- return MF->getMMI().getModule()->getContext().emitError(LocCookie, Msg);
+ return MF->getFunction().getContext().emitError(LocCookie, Msg);
report_fatal_error(Msg);
}
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp
index fb18f5a8a884a..60deb62bc908a 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -130,7 +130,7 @@ void RegAllocBase::allocatePhysRegs() {
MI->emitError("inline assembly requires more registers than available");
} else if (MI) {
LLVMContext &Context =
- MI->getParent()->getParent()->getMMI().getModule()->getContext();
+ MI->getParent()->getParent()->getFunction().getContext();
Context.emitError("ran out of registers during register allocation");
} else {
report_fatal_error("ran out of registers during register allocation");
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index bbd4c3521d908..98a795edb7a03 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -7375,8 +7375,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
case Intrinsic::codeview_annotation: {
// Emit a label associated with this metadata.
MachineFunction &MF = DAG.getMachineFunction();
- MCSymbol *Label =
- MF.getMMI().getContext().createTempSymbol("annotation", true);
+ MCSymbol *Label = MF.getContext().createTempSymbol("annotation", true);
Metadata *MD = cast<MetadataAsValue>(I.getArgOperand(0))->getMetadata();
MF.addCodeViewAnnotation(Label, cast<MDNode>(MD));
Res = DAG.getLabelNode(ISD::ANNOTATION_LABEL, sdl, getRoot(), Label);
@@ -7644,9 +7643,8 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
assert(FuncInfo.StaticAllocaMap.count(Slot) &&
"can only escape static allocas");
int FI = FuncInfo.StaticAllocaMap[Slot];
- MCSymbol *FrameAllocSym =
- MF.getMMI().getContext().getOrCreateFrameAllocSymbol(
- GlobalValue::dropLLVMManglingEscape(MF.getName()), Idx);
+ MCSymbol *FrameAllocSym = MF.getContext().getOrCreateFrameAllocSymbol(
+ GlobalValue::dropLLVMManglingEscape(MF.getName()), Idx);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, dl,
TII->get(TargetOpcode::LOCAL_ESCAPE))
.addSym(FrameAllocSym)
@@ -7665,9 +7663,8 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
auto *Idx = cast<ConstantInt>(I.getArgOperand(2));
unsigned IdxVal =
unsigned(Idx->getLimitedValue(std::numeric_limits<int>::max()));
- MCSymbol *FrameAllocSym =
- MF.getMMI().getContext().getOrCreateFrameAllocSymbol(
- GlobalValue::dropLLVMManglingEscape(Fn->getName()), IdxVal);
+ MCSymbol *FrameAllocSym = MF.getContext().getOrCreateFrameAllocSymbol(
+ GlobalValue::dropLLVMManglingEscape(Fn->getName()), IdxVal);
Value *FP = I.getArgOperand(1);
SDValue FPVal = getValue(FP);
@@ -8626,7 +8623,7 @@ SDValue SelectionDAGBuilder::lowerStartEH(SDValue Chain,
// Insert a label before the invoke call to mark the try range. This can be
// used to detect deletion of the invoke via the MachineModuleInfo.
- BeginLabel = MMI.getContext().createTempSymbol();
+ BeginLabel = MF.getContext().createTempSymbol();
// For SjLj, keep track of which landing pads go with which invokes
// so as to maintain the ordering of pads in the LSDA.
@@ -8648,11 +8645,10 @@ SDValue SelectionDAGBuilder::lowerEndEH(SDValue Chain, const InvokeInst *II,
assert(BeginLabel && "BeginLabel should've been set");
MachineFunction &MF = DAG.getMachineFunction();
- MachineModuleInfo &MMI = MF.getMMI();
// Insert a label at the end of the invoke call to mark the try range. This
// can be used to detect deletion of the invoke via the MachineModuleInfo.
- MCSymbol *EndLabel = MMI.getContext().createTempSymbol();
+ MCSymbol *EndLabel = MF.getContext().createTempSymbol();
Chain = DAG.getEHLabel(getCurSDLoc(), Chain, EndLabel);
// Inform MachineModuleInfo of range.
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index 6b860466a8875..c5fa4e6211a63 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -97,7 +97,6 @@ void TailDuplicator::initMF(MachineFunction &MFin, bool PreRegAlloc,
TII = MF->getSubtarget().getInstrInfo();
TRI = MF->getSubtarget().getRegisterInfo();
MRI = &MF->getRegInfo();
- MMI = &MF->getMMI();
MBPI = MBPIin;
MBFI = MBFIin;
PSI = PSIin;
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 976691b7de448..0d3e4ba5662e0 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2323,7 +2323,7 @@ bool TargetLoweringObjectFileXCOFF::ShouldSetSSPCanaryBitInTB(
MCSymbol *
TargetLoweringObjectFileXCOFF::getEHInfoTableSymbol(const MachineFunction *MF) {
- MCSymbol *EHInfoSym = MF->getMMI().getContext().getOrCreateSymbol(
+ MCSymbol *EHInfoSym = MF->getContext().getOrCreateSymbol(
"__ehinfo." + Twine(MF->getFunctionNumber()));
cast<MCSymbolXCOFF>(EHInfoSym)->setEHInfo();
return EHInfoSym;
diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
index eb0ff73200407..465e689d4a7a5 100644
--- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
@@ -116,7 +116,7 @@ void AArch64PointerAuth::signLR(MachineFunction &MF,
// PAuthLR authentication instructions need to know the value of PC at the
// point of signing (PACI*).
if (MFnI.branchProtectionPAuthLR()) {
- MCSymbol *PACSym = MF.getMMI().getContext().createTempSymbol();
+ MCSymbol *PACSym = MF.getContext().createTempSymbol();
MFnI.setSigningInstrLabel(PACSym);
}
diff --git a/llvm/lib/Target/ARC/ARCFrameLowering.cpp b/llvm/lib/Target/ARC/ARCFrameLowering.cpp
index 6b5802d972eb7..1227fae13211a 100644
--- a/llvm/lib/Target/ARC/ARCFrameLowering.cpp
+++ b/llvm/lib/Target/ARC/ARCFrameLowering.cpp
@@ -116,8 +116,7 @@ void ARCFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
LLVM_DEBUG(dbgs() << "Emit Prologue: " << MF.getName() << "\n");
auto *AFI = MF.getInfo<ARCFunctionInfo>();
- MachineModuleInfo &MMI = MF.getMMI();
- MCContext &Context = MMI.getContext();
+ MCContext &Context = MF.getContext();
const MCRegisterInfo *MRI = Context.getRegisterInfo();
const ARCInstrInfo *TII = MF.getSubtarget<ARCSubtarget>().getInstrInfo();
MachineBasicBlock::iterator MBBI = MBB.begin();
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index e94b0f6e1a44f..62d01b9f7e90b 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -735,8 +735,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock::iterator MBBI = MBB.begin();
MachineFrameInfo &MFI = MF.getFrameInfo();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
- MachineModuleInfo &MMI = MF.getMMI();
- MCContext &Context = MMI.getContext();
+ MCContext &Context = MF.getContext();
const TargetMachine &TM = MF.getTarget();
const MCRegisterInfo *MRI = Context.getRegisterInfo();
const ARMBaseRegisterInfo *RegInfo = STI.getRegisterInfo();
@@ -2995,8 +2994,7 @@ void ARMFrameLowering::adjustForSegmentedStacks(
report_fatal_error("Segmented stacks not supported on this platform.");
MachineFrameInfo &MFI = MF.getFrameInfo();
- MachineModuleInfo &MMI = MF.getMMI();
- MCContext &Context = MMI.getContext();
+ MCContext &Context = MF.getContext();
const MCRegisterInfo *MRI = Context.getRegisterInfo();
const ARMBaseInstrInfo &TII =
*static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo());
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
index e908f1fb95124..cb9ded7dee57b 100644
--- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -149,8 +149,7 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock::iterator MBBI = MBB.begin();
MachineFrameInfo &MFI = MF.getFrameInfo();
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
const ThumbRegisterInfo *RegInfo =
static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
const Thumb1InstrInfo &TII =
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index f4f84beea734d..6ca18528591af 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1032,7 +1032,6 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
MachineBasicBlock::iterator At) const {
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = MF.getFrameInfo();
- MachineModuleInfo &MMI = MF.getMMI();
auto &HST = MF.getSubtarget<HexagonSubtarget>();
auto &HII = *HST.getInstrInfo();
auto &HRI = *HST.getRegisterInfo();
@@ -1043,7 +1042,7 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
DebugLoc DL;
const MCInstrDesc &CFID = HII.get(TargetOpcode::CFI_INSTRUCTION);
- MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
+ MCSymbol *FrameLabel = MF.getContext().createTempSymbol();
bool HasFP = hasFP(MF);
if (HasFP) {
diff --git a/llvm/lib/Target/M68k/M68kFrameLowering.cpp b/llvm/lib/Target/M68k/M68kFrameLowering.cpp
index 6347a52e19188..36443f9d33451 100644
--- a/llvm/lib/Target/M68k/M68kFrameLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kFrameLowering.cpp
@@ -452,8 +452,7 @@ void M68kFrameLowering::emitPrologueCalleeSavedFrameMoves(
const DebugLoc &DL) const {
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = MF.getFrameInfo();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
// Add callee saved registers to move list.
const auto &CSI = MFI.getCalleeSavedInfo();
diff --git a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
index 176387d71fcb6..f4d703ebeeab2 100644
--- a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
+++ b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
@@ -59,8 +59,7 @@ void MSP430FrameLowering::emitCalleeSavedFrameMoves(
const DebugLoc &DL, bool IsPrologue) const {
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = MF.getFrameInfo();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
// Add callee saved registers to move list.
const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
diff --git a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
index 10c953bb344a8..f72c49eb707db 100644
--- a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -54,8 +54,7 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
// No need to allocate space on the stack.
if (StackSize == 0 && !MFI.adjustsStack()) return;
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
// Adjust stack.
TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
index 38f6889a52358..ceb0668c455d6 100644
--- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
@@ -427,8 +427,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF,
// No need to allocate space on the stack.
if (StackSize == 0 && !MFI.adjustsStack()) return;
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
// Adjust stack.
TII.adjustStackPtr(SP, -StackSize, MBB, MBBI);
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index 277d708013c78..1963582ce6863 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -613,8 +613,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
const PPCTargetLowering &TLI = *Subtarget.getTargetLowering();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
DebugLoc dl;
// AIX assembler does not support cfi directives.
const bool needsCFI = MF.needsFrameMoves() && !Subtarget.isAIXABI();
@@ -1239,8 +1238,7 @@ void PPCFrameLowering::inlineStackProbe(MachineFunction &MF,
const PPCTargetLowering &TLI = *Subtarget.getTargetLowering();
const PPCInstrInfo &TII = *Subtarget.getInstrInfo();
MachineFrameInfo &MFI = MF.getFrameInfo();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
// AIX assembler does not support cfi directives.
const bool needsCFI = MF.needsFrameMoves() && !Subtarget.isAIXABI();
auto StackAllocMIPos = llvm::find_if(PrologMBB, [](MachineInstr &MI) {
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index a11ab93b8db3c..898d1f80d0564 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -5559,7 +5559,7 @@ static SDValue transformCallee(const SDValue &Callee, SelectionDAG &DAG,
// C-linkage name. A Qualname is returned here because an external
// function entry point is a csect with XTY_ER property.
const auto getExternalFunctionEntryPointSymbol = [&](StringRef SymName) {
- auto &Context = DAG.getMachineFunction().getMMI().getContext();
+ auto &Context = DAG.getMachineFunction().getContext();
MCSectionXCOFF *Sec = Context.getXCOFFSection(
(Twine(".") + Twine(SymName)).str(), SectionKind::getMetadata(),
XCOFF::CsectProperties(XCOFF::XMC_PR, XCOFF::XTY_ER));
diff --git a/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp b/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
index 2344ec529e16d..ae4e039744286 100644
--- a/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
@@ -196,7 +196,7 @@ static void validateGroupWaitEventsPtr(const SPIRVSubtarget &STI,
if (!ElemType || ElemType->getOpcode() == SPIRV::OpTypeEvent)
return;
// Insert a bitcast before the instruction to keep SPIR-V code valid.
- LLVMContext &Context = MF->getMMI().getModule()->getContext();
+ LLVMContext &Context = MF->getFunction().getContext();
SPIRVType *NewPtrType =
createNewPtrType(GR, I, OpType, false, true, nullptr,
TargetExtType::get(Context, "spirv.Event"));
diff --git a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
index a769fdeff5684..8c53b8dffc2fa 100644
--- a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
@@ -517,8 +517,7 @@ static void buildDefCFAReg(MachineBasicBlock &MBB,
const DebugLoc &DL, unsigned Reg,
const SystemZInstrInfo *ZII) {
MachineFunction &MF = *MBB.getParent();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
unsigned RegNum = MRI->getDwarfRegNum(Reg, true);
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createDefCfaRegister(nullptr, RegNum));
@@ -535,8 +534,7 @@ void SystemZELFFrameLowering::emitPrologue(MachineFunction &MF,
auto *ZII = static_cast<const SystemZInstrInfo *>(STI.getInstrInfo());
SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
MachineBasicBlock::iterator MBBI = MBB.begin();
- MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
bool HasFP = hasFP(MF);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
index aa3aa1b007a53..ea795cd00ed5b 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -886,7 +886,7 @@ bool WebAssemblyFastISel::selectCall(const Instruction *I) {
MIB.addImm(0);
// The table into which this call_indirect indexes.
MCSymbolWasm *Table = WebAssembly::getOrCreateFunctionTableSymbol(
- MF->getMMI().getContext(), Subtarget);
+ MF->getContext(), Subtarget);
if (Subtarget->hasReferenceTypes()) {
MIB.addSym(Table);
} else {
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 8a263e1a0678b..89801783e9280 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -466,8 +466,7 @@ void X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(
emitCalleeSavedFrameMoves(MBB, MBBI, DebugLoc{}, true);
return;
}
- const MachineModuleInfo &MMI = MF.getMMI();
- const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
+ const MCRegisterInfo *MRI = MF.getContext().getRegisterInfo();
const Register FramePtr = TRI->getFrameRegister(MF);
const Register MachineFramePtr =
STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64))
@@ -485,8 +484,7 @@ void X86FrameLowering::emitCalleeSavedFrameMoves(
const DebugLoc &DL, bool IsPrologue) const {
MachineFunction &MF = *MBB....
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/99652
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