[llvm] f554dd7 - [GlobalIsel] import G_SCMP and G_UCMP (#99518)

[via llvm-commits]

Author: Thorsten Schütt
Date: 2024-07-19T06:16:12+02:00
New Revision: f554dd7e7690f96ecc130065972c306cf0decd7b

URL: https://github.com/llvm/llvm-project/commit/f554dd7e7690f96ecc130065972c306cf0decd7b
DIFF: https://github.com/llvm/llvm-project/commit/f554dd7e7690f96ecc130065972c306cf0decd7b.diff

LOG: [GlobalIsel] import G_SCMP and G_UCMP (#99518)

See https://github.com/llvm/llvm-project/pull/98894

Added: 
    llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll

Modified: 
    llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 72dff12423ced..40a691af22748 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -2561,6 +2561,16 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
     MIRBuilder.buildVScale(getOrCreateVReg(CI), 1);
     return true;
   }
+  case Intrinsic::scmp:
+    MIRBuilder.buildSCmp(getOrCreateVReg(CI),
+                         getOrCreateVReg(*CI.getOperand(0)),
+                         getOrCreateVReg(*CI.getOperand(1)));
+    return true;
+  case Intrinsic::ucmp:
+    MIRBuilder.buildUCmp(getOrCreateVReg(CI),
+                         getOrCreateVReg(*CI.getOperand(0)),
+                         getOrCreateVReg(*CI.getOperand(1)));
+    return true;
   case Intrinsic::prefetch: {
     Value *Addr = CI.getOperand(0);
     unsigned RW = cast<ConstantInt>(CI.getOperand(1))->getZExtValue();

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll
new file mode 100644
index 0000000000000..1fa21bfb733e8
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll
@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -O0 -mtriple=aarch64-linux-gnu -global-isel -stop-after=irtranslator %s -o - | FileCheck %s
+
+define void @scmp_i32(i32 %arg1, i32 %arg2) {
+  ; CHECK-LABEL: name: scmp_i32
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $w0, $w1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+  ; CHECK-NEXT:   [[SCMP:%[0-9]+]]:_(s4) = G_SCMP [[COPY]](s32), [[COPY1]]
+  ; CHECK-NEXT:   RET_ReallyLR
+  %res4 = call i4 @llvm.scmp.i4.i32(i32 %arg1, i32 %arg2)
+  ret void
+}
+
+define void @scmp_4_32i(<4 x i32> %arg1, <4 x i32> %arg2) {
+  ; CHECK-LABEL: name: scmp_4_32i
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $q0, $q1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
+  ; CHECK-NEXT:   [[SCMP:%[0-9]+]]:_(<4 x s32>) = G_SCMP [[COPY]](<4 x s32>), [[COPY1]]
+  ; CHECK-NEXT:   RET_ReallyLR
+  %res4 = call <4 x i32> @llvm.scmp.v4i32.i32(<4 x i32> %arg1, <4 x i32> %arg2)
+  ret void
+}
+
+define void @ucmp_i32(i32 %arg1, i32 %arg2) {
+  ; CHECK-LABEL: name: ucmp_i32
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $w0, $w1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+  ; CHECK-NEXT:   [[UCMP:%[0-9]+]]:_(s4) = G_UCMP [[COPY]](s32), [[COPY1]]
+  ; CHECK-NEXT:   RET_ReallyLR
+  %res4 = call i4 @llvm.ucmp.i4.i32(i32 %arg1, i32 %arg2)
+  ret void
+}
+
+define void @ucmp_4_32i(<4 x i32> %arg1, <4 x i32> %arg2) {
+  ; CHECK-LABEL: name: ucmp_4_32i
+  ; CHECK: bb.1 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $q0, $q1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1
+  ; CHECK-NEXT:   [[UCMP:%[0-9]+]]:_(<4 x s32>) = G_UCMP [[COPY]](<4 x s32>), [[COPY1]]
+  ; CHECK-NEXT:   RET_ReallyLR
+  %res4 = call <4 x i32> @llvm.ucmp.v4i32.i32(<4 x i32> %arg1, <4 x i32> %arg2)
+  ret void
+}