[llvm] [RISCV] Use Root instead of N throughout the worklist loop in combineBinOp_VLToVWBinOp_VL. (PR #99416)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 18 13:32:03 PDT 2024


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `lld-x86_64-ubuntu-fast` running on `as-builder-4` while building `llvm` at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/33/builds/945

Here is the relevant piece of the build log for the reference:
```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
RUN: at line 2: /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/FileCheck /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll --check-prefixes=CHECK,RV32
+ /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs
+ /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/FileCheck /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll --check-prefixes=CHECK,RV32
/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll:890:15: error: CHECK-NEXT: expected string not found in input
; CHECK-NEXT: vle8.v v8, (a1)
              ^
<stdin>:850:36: note: scanning from here
 vsetivli zero, 2, e16, mf4, ta, ma
                                   ^
<stdin>:851:2: note: possible intended match here
 vle8.v v8, (a0)
 ^

Input file: <stdin>
Check file: /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
          845:  .type vwmul_v2i16_multiuse, at function 
          846:  .variant_cc vwmul_v2i16_multiuse 
          847: vwmul_v2i16_multiuse: # @vwmul_v2i16_multiuse 
          848:  .cfi_startproc 
          849: # %bb.0: 
          850:  vsetivli zero, 2, e16, mf4, ta, ma 
next:890'0                                        X error: no match found
          851:  vle8.v v8, (a0) 
next:890'0     ~~~~~~~~~~~~~~~~~
next:890'1      ?                possible intended match
          852:  vle8.v v9, (a1) 
next:890'0     ~~~~~~~~~~~~~~~~~
          853:  vle8.v v10, (a2) 
next:890'0     ~~~~~~~~~~~~~~~~~~
          854:  vle8.v v11, (a3) 
next:890'0     ~~~~~~~~~~~~~~~~~~
          855:  vsext.vf2 v12, v8 
next:890'0     ~~~~~~~~~~~~~~~~~~~
          856:  vsext.vf2 v8, v9 
next:890'0     ~~~~~~~~~~~~~~~~~~
            .
            .
...

```

https://github.com/llvm/llvm-project/pull/99416


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