[llvm] [CodeGen] Emit more efficient magic numbers for exact udivs (PR #87161)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 17 11:54:36 PDT 2024


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@@ -5283,9 +5333,6 @@ bool CombinerHelper::matchUDivByConst(MachineInstr &MI) {
   Register Dst = MI.getOperand(0).getReg();
   Register RHS = MI.getOperand(2).getReg();
   LLT DstTy = MRI.getType(Dst);
-  auto *RHSDef = MRI.getVRegDef(RHS);
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AtariDreams wrote:

> Doesn't matchUnaryPredicate fail to match if its not a constant or constant vector?

That is correct. I changed as little as possible while also matching the logic of SDIV. 

https://github.com/llvm/llvm-project/pull/87161


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