[llvm] 64f67a4 - adjust the Xtensa backend after change f270a4dd6667759d7305797a077ae09648318ac7
Sylvestre Ledru via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 17 04:48:32 PDT 2024
Author: Sylvestre Ledru
Date: 2024-07-17T13:48:12+02:00
New Revision: 64f67a448740480b0ff5d8c89ee2b99878c5559c
URL: https://github.com/llvm/llvm-project/commit/64f67a448740480b0ff5d8c89ee2b99878c5559c
DIFF: https://github.com/llvm/llvm-project/commit/64f67a448740480b0ff5d8c89ee2b99878c5559c.diff
LOG: adjust the Xtensa backend after change f270a4dd6667759d7305797a077ae09648318ac7
Similar fix as in 3941f652317d95cac203e64791bfa730de7bbd1e
Added:
Modified:
llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
index 5d5a34157cc9f..80d01d662a221 100644
--- a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
@@ -356,7 +356,7 @@ XtensaTargetLowering::LowerCall(CallLoweringInfo &CLI,
SDValue Memcpy = DAG.getMemcpy(
Chain, DL, Address, ArgValue, SizeNode, Flags.getNonZeroByValAlign(),
/*isVolatile=*/false, /*AlwaysInline=*/false,
- /*isTailCall=*/false, MachinePointerInfo(), MachinePointerInfo());
+ /*CI=*/nullptr, std::nullopt, MachinePointerInfo(), MachinePointerInfo());
MemOpChains.push_back(Memcpy);
} else {
assert(VA.isMemLoc() && "Argument not register or memory");
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