[llvm] [DXIL][Doc] Update specification of to use TableGen list instead of dag (PR #99055)
Justin Bogner via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 16 10:25:27 PDT 2024
================
@@ -188,96 +219,166 @@ A shader model version predicate class is defined as
Version SMVersion = ver;
}
-A constraint class to represent overload types and shader stages predicated on shader
-model version is defined as
+Overload type predicates are represented as records of the class
.. code-block::
- class SMVersionConstraints<SMVersion smver, dag oloads, dag stages> : Constraint<smver> {
- dag overload_types = oloads;
- dag stage_kinds = stages;
+ class Overloads<list<LLVMType> tys> : Pred {
+ list<LLVMType> overload_types = tys;
+ }
+
+Shader Stage predicates are represented as records of class
+
+.. code-block::
+
+ class Stages<list<ShaderStage> st> : Pred {
+ list<ShaderStage> stage_kinds = st;
}
-The ``dag overload_types`` and ``dag shader_kinds`` use a special markers ``overloads``
-and ``stages``, respectively.
+Overload and shader stages constrained by Shader Model version are expressed by
+composing the above predicate records.
-Examples of Constraints
------------------------
+If no constraints are specified for a DXIL operation, it is assumed to
-Consider a DXIL Operation that is valid in Shader Model 6.2 and later,
+a) be supported in Shader Model 6.0 and later.
+b) have no overload types
+c) be supported in all shader stage kinds
-1. with valid overload types ``half``, ``float``, ``i16`` and ``i32``
-2. is valid for stages ``pixel`` and ``compute``
-3. with valid overload types ``double`` and ``i614`` if Shader Model version 6.3 and later
-4. is valid for all stages if Shader Model version 6.3 and later
+If a constraint is specified, one or both of the Overload type and shader kind
+constraints can be omitted when appropriate.
-This is represented as
+Examples of Constraint Specification
+------------------------------------
-.. code-block::
+1. Consider a DXIL Operation with the following properties,
- [SMVersionConstraints<SMVersion<SM6_2>,
- (overloads llvm_half_ty, llvm_float_ty, llvm_i16_ty, llvm_i32_ty),
- (stages pixel, compute)>,
- SMVersionConstraints<SMVersion<SM6_3>,
- (overloads llvm_half_ty, llvm_float_ty, llvm_double_ty,
- llvm_i16_ty, llvm_i32_ty, llvm_i64_ty),
- (stages allKinds)>];
+ 1. In Shader Model 6.2 and later
-Consider a DXIL operation that is valid in Shader Model version 6.2 and later,
+ a) supports overload types ``half``, ``float``, ``i16`` and ``i32`` and
+ b) is valid for stages ``pixel`` and ``compute``
-1. with no overload types, i.e., all argument typess and result type are fixed.
-2. is valid for all stages.
+ 2. In Shader Model 6.3 and later
-This is represented as
+ a) supports additional valid overload types ``double`` and ``i64`` and
+ b) is valid for all stages
-.. code-block::
+ The constraints of such an operation are represented as
+
+ .. code-block::
+
+ constraints = [Constraints<SMVersion<SM6_2>,
+ [Overloads<[llvm_half_ty, llvm_float_ty, llvm_i16_ty, llvm_i32_ty]>,
+ Stages<[pixel, compute]>]>,
+ Constraints<SMVersion<SM6_3>,
+ [Overloads<[llvm_half_ty, llvm_float_ty, llvm_double_ty,
+ llvm_i16_ty, llvm_i32_ty, llvm_i64_ty]>]];
+
+ Note that ``Stage<>`` predicate is not specified for the constraint predicated for
+ ``SM6_3`` to signify that the operation is valid in all shader stages in Shader Model
+ version 6.3.
- [SMVersionConstraints<SMVersion<SM6_2>, (overloads), (stages allKinds)>];
+2. Consider a DXIL operation that is valid in Shader Model version 6.2 and later,
+ 1. with no overload types, i.e., all argument types and result type are fixed.
+ 2. is valid for all stages.
-Specifying attributes predicated on Shader Model version using the single field
-``sm_constraints`` not only allows for all of them to be specified together but
+ This is represented as
+
+ .. code-block::
+
+ [Constraints<SMVersion<SM6_2>, []];
+
+Specifying properties predicated on Shader Model version using the field
+``constraints`` not only allows for all of them to be specified together but
also allows for a single place to specify minimum shader model version that supports
-the operation. Thus, a separate fiels is not needed to specify minimum shader model
+the operation. Thus, a separate field is not needed to specify minimum shader model
version.
Attribute Specification
=======================
DXIL Operation attributes that are not predicated on any constraint, are represented as
-a ``dag`` of Attribute records of the following abstract ``DXILAttributes`` class.
+a ``list`` of Attribute records of ``DXILAttributes`` class.
.. code-block::
class DXILAttributes;
-Following example records represent memory attributes
+Following example records represent memory attributes
.. code-block::
def ReadOnly : DXILOpAttributes;
def ReadNone : DXILOpAttributes;
-DXIL Operation Specification Example
-====================================
-Following illustrates the specification of the DXIL Op ``Sin``
+DXIL Operation Specification Examples
+=====================================
+
+A convenience class ``DXILOpAndCLass`` is defined to specify the minimal properties
+of a ``DXILOp`` as follows.
.. code-block::
- def Sin : DXILOp {
- let Doc ="Returns sine(theta) for theta in radians.";
- let OpCode = 13;
- let OpClass = unary;
+ class DXILOpAndClass<int opcode, DXILOpClass opcalss> : DXILOp {
+ int OpCode = opcode;
+ DXILOpClass OpClass = opcalss;
+ }
+
+Following examples illustrate the specification of some of the DXIL Ops
+
+``Sin`` operation valid in SM 6.0 for all shader stages but with overload types constraints.
+
+.. code-block::
+
+ def Sin : DXILOpAndClass<13, unary> {
+ let Doc = "Returns sine(theta) for theta in radians.";
let LLVMIntrinsic = int_sin;
- let arguments = (ins LLVMMatchType<0>);
- let result = (out dxil_overload_ty);
- let sm_constraints = [SMVersionConstraints<SMVersion<SM6_0>,
- (overloads llvm_half_ty, llvm_float_ty),
- (stages allKinds)>];
- let attributes = (attrs ReadNone);
+ let arguments = [LLVMMatchType<0>];
+ let result = [dxil_overload_ty];
+ let constraints = [
+ Constraints<SMVersion<SM6_0>, [Overloads<[llvm_half_ty, llvm_float_ty]>]>
+ ];
+ let attributes = [ReadNone];
let DXILVersion = DX1_0;
}
+
+``FlattenedThreadIdInGroup`` operation valid in SM 6.0 with shader stage validity
+constraints; with fixed argument type, hence no valid overload type and ``void``
+return type, hence ``result`` field not specified.
+
+.. code-block::
+
+ def FlattenedThreadIdInGroup : DXILOpAndClass<96, flattenedThreadIdInGroup> {
+ let Doc = "Provides a flattened index for a given thread within a given "
+ "group (SV_GroupIndex)";
+ let LLVMIntrinsic = int_dx_flattened_thread_id_in_group;
+ let arguments = [llvm_i32_ty];
+ let constraints =
+ [Constraints<SMVersion<SM6_0>,
+ [Stages<[compute, mesh, amplification, node]>]>];
+ let attributes = [ReadNone];
+ let DXILVersion = DX1_0;
+ }
+
+``RawBufferStore`` operation with different valid overload types for SM 6.2+ and SM 6.3+.
+
+.. code-block::
+
+ def RawBufferStore : DXILOpAndClass<140, rawBufferStore> {
+ let Doc = "Writes to a RWByteAddressBuffer or RWStructuredBuffer.";
+ let LLVMIntrinsic = int_rwbuffer_store;
+ let arguments = [llvm_i32_ty, dxil_resource_ty, llvm_i32_ty, llvm_i32_ty, dxil_overload_ty,
+ dxil_overload_ty, dxil_overload_ty, dxil_overload_ty, llvm_i8_ty, llvm_i32_ty];
+ let constraints = [Constraints<SMVersion<SM6_2>,
+ [Overloads<[llvm_half_ty, llvm_float_ty, llvm_i16_ty, llvm_i32_ty]>]>,
+ Constraints<SMVersion<SM6_3>,
+ [Overloads<[llvm_half_ty, llvm_float_ty, llvm_double_ty,
+ llvm_i16_ty, llvm_i32_ty, llvm_i64_ty]>]>];
+ let DXILVersion = DX1_2;
+ }
----------------
bogner wrote:
This accidentally left the opcode in the arguments. Also it's a bit of a funny example because it won't necessarily map exactly 1-1 with an intrinsic. Going with my various suggestions:
```
def RawBufferStore : DXILOp<140, rawBufferStore> {
let Doc = "Writes to a RWByteAddressBuffer or RWStructuredBuffer.";
let arguments = [dxil_resource_ty, llvm_i32_ty, llvm_i32_ty,
dxil_overload_ty, dxil_overload_ty, dxil_overload_ty,
dxil_overload_ty, llvm_i8_ty, llvm_i32_ty];
let constraints = [
Constraints<DXILVersion<DX1_2>,
[Overloads<[
llvm_half_ty, llvm_float_ty, llvm_i16_ty, llvm_i32_ty]>]>,
Constraints<DXILVersion<DX1_3>,
[Overloads<[llvm_half_ty, llvm_float_ty, llvm_double_ty,
llvm_i16_ty, llvm_i32_ty, llvm_i64_ty]>]>];
}
```
https://github.com/llvm/llvm-project/pull/99055
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