[llvm] [MachineCopyPropagation] Detect and fix suboptimal instruction order to enable optimizations (PR #98087)

[Gábor Spaits via llvm-commits]

spaits wrote:

Gentle ping @s-barannikov @qcolombet @arsenm . Sorry to ping you. I just want to get feedback for my plan. I want to know if my approach is correct. (I should have done this before this PR to, but instead I just went along with what I thought would be the correct approach from seeing https://discourse.llvm.org/t/how-to-copy-propagate-physical-register-introduced-before-ra/74828 ).

The reason why I want an early opinion from you is:
- It may be bigger work to integrate the existing anti dependency breaker into the new scheduler. Also I want it to be turned on by default when using O3. Is it okay to use anti dep breaker by deafult at some OP level? Which anti dep breaker at which level? (There are two Aggressive or Critical). I would prefer aggressive at O3.
- Currently non of the anti dependency breakers are capable to resolve the dependencies I am complaining about. I must extend one of the two dep breaker implementations. Which one should I extend? Aggressive or Critical? I was suggested aggressive.
- The extension I am planning would involve moving around instructions? Is it fine if the anti dep breaker does that. Currently it just renames.
- Currently the new 
- I want this to work on RISCV. Currently RISCV doesn't have the new post RA scheduler enabled. What should I work on for it to be enabled? (Maybe @topperc could you give any input on this please?)

Sorry for the long message again. I just want to know if what I am planning to do makes sense or is reasonable before I start doing it.

I have also created a discourse post: https://discourse.llvm.org/t/anti-dependency-breaking-and-the-new-sceduler/80109.

Thank you for your time and effort!

https://github.com/llvm/llvm-project/pull/98087