[llvm] 9e52a9e - [RISCV] Simplify some checks of when we can't form a widening vector FP operation. NFCI

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 15 17:58:06 PDT 2024


Author: Craig Topper
Date: 2024-07-15T17:50:43-07:00
New Revision: 9e52a9ee6370fbe7486c4bed5858b1a8ea8ec86f

URL: https://github.com/llvm/llvm-project/commit/9e52a9ee6370fbe7486c4bed5858b1a8ea8ec86f
DIFF: https://github.com/llvm/llvm-project/commit/9e52a9ee6370fbe7486c4bed5858b1a8ea8ec86f.diff

LOG: [RISCV] Simplify some checks of when we can't form a widening vector FP operation. NFCI

The _VL nodes are only used with scalable vectors so we don't need
to check that.

It doesn't matter if Zvfhmin is enabled. All that really matters is
whether Zvfh is.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index d9ab3a49d047c..8b5e56bff4097 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -15507,12 +15507,9 @@ static SDValue performVFMADD_VLCombine(SDNode *N, SelectionDAG &DAG,
   if (SDValue V = combineVFMADD_VLWithVFNEG_VL(N, DAG))
     return V;
 
-  if (N->getValueType(0).isScalableVector() &&
-      N->getValueType(0).getVectorElementType() == MVT::f32 &&
-      (Subtarget.hasVInstructionsF16Minimal() &&
-       !Subtarget.hasVInstructionsF16())) {
+  if (N->getValueType(0).getVectorElementType() == MVT::f32 &&
+      !Subtarget.hasVInstructionsF16())
     return SDValue();
-  }
 
   // FIXME: Ignore strict opcodes for now.
   if (N->isTargetStrictFPOpcode())
@@ -17275,10 +17272,8 @@ SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
   case RISCVISD::FMUL_VL:
   case RISCVISD::VFWADD_W_VL:
   case RISCVISD::VFWSUB_W_VL: {
-    if (N->getValueType(0).isScalableVector() &&
-        N->getValueType(0).getVectorElementType() == MVT::f32 &&
-        (Subtarget.hasVInstructionsF16Minimal() &&
-         !Subtarget.hasVInstructionsF16()))
+    if (N->getValueType(0).getVectorElementType() == MVT::f32 &&
+        !Subtarget.hasVInstructionsF16())
       return SDValue();
     return combineBinOp_VLToVWBinOp_VL(N, DCI, Subtarget);
   }


        


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