[llvm] [CodeGen] Emit more efficient magic numbers for exact udivs (PR #87161)

[via llvm-commits]

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@@ -5283,9 +5333,6 @@ bool CombinerHelper::matchUDivByConst(MachineInstr &MI) {
   Register Dst = MI.getOperand(0).getReg();
   Register RHS = MI.getOperand(2).getReg();
   LLT DstTy = MRI.getType(Dst);
-  auto *RHSDef = MRI.getVRegDef(RHS);
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AtariDreams wrote:

No it does not. In addition, just like SDIV, the predicate below is what is needed as long as it is exact.

If it is not exact, then it requires a constant or constant vector.

If this isn't true, then SDIV will have to be fixed as well. However, this patch doesn't touch that.

https://github.com/llvm/llvm-project/pull/87161