[llvm] [GlobalIsel] Add G_SCMP and G_UCMP instructions (PR #98894)

[Michael Maitland via llvm-commits]

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@@ -1273,6 +1273,34 @@ class MachineIRBuilder {
                                 const SrcOp &Op0, const SrcOp &Op1,
                                 std::optional<unsigned> Flags = std::nullopt);
 
+  /// Build and insert a \p Res = G_SCMP \p Op0, \p Op1
+  ///
+  /// \pre setBasicBlock or setMI must have been called.
+
+  /// \pre \p Res must be a generic virtual register with scalar or
+  ///      vector type. Typically this starts as s2 or <N x s2>.
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michaelmaitland wrote:

> Typically this starts as s2 or <N x s2>.

Could you help me understand this? Why not `s1`, `<N x s1>`, or `<vscale x N x s1>`?

https://github.com/llvm/llvm-project/pull/98894