[llvm] [AMDGPU] Update live interval in `convertToThreeAddress` (PR #98781)
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Sat Jul 13 19:25:12 PDT 2024
https://github.com/paperchalice updated https://github.com/llvm/llvm-project/pull/98781
>From 728aafcd5c4ee599e73a3245c218410cd0049440 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Sun, 14 Jul 2024 08:47:03 +0800
Subject: [PATCH] [AMDGPU] Update live interval in `convertToThreeAddress`
---
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 2 +-
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 7 +++----
2 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 73385fee019b0..711ef71e975d9 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -713,7 +713,6 @@ bool TwoAddressInstructionPass::isProfitableToConv3Addr(Register RegA,
bool TwoAddressInstructionPass::convertInstTo3Addr(
MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi,
Register RegA, Register RegB, unsigned &Dist) {
- MachineInstrSpan MIS(mi, MBB);
MachineInstr *NewMI = TII->convertToThreeAddress(*mi, LV, LIS);
if (!NewMI)
return false;
@@ -736,6 +735,7 @@ bool TwoAddressInstructionPass::convertInstTo3Addr(
std::make_pair(NewInstrNum, NewIdx));
}
+ MachineInstrSpan MIS(mi, MBB);
MBB->erase(mi); // Nuke the old inst.
for (MachineInstr &MI : MIS)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index cc1b9ac0c9ecd..2d8b79714e074 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3952,12 +3952,11 @@ MachineInstr *SIInstrInfo::convertToThreeAddress(MachineInstr &MI,
Register DefReg = DefMI->getOperand(0).getReg();
if (!MRI.hasOneNonDBGUse(DefReg))
return;
- // We cannot just remove the DefMI here, calling pass will crash.
- DefMI->setDesc(get(AMDGPU::IMPLICIT_DEF));
- for (unsigned I = DefMI->getNumOperands() - 1; I != 0; --I)
- DefMI->removeOperand(I);
if (LV)
LV->getVarInfo(DefReg).AliveBlocks.clear();
+ if (LIS)
+ LIS->removeInterval(DefReg);
+ DefMI->eraseFromParent();
};
int64_t Imm;
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