[llvm] [AArch64] Remove redundant instructions in int-to-fp of lowest vector… (PR #98602)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 13 09:52:21 PDT 2024
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@@ -6068,6 +6068,32 @@ def : Pat<(f16 (any_sint_to_fp (i32 (any_fp_to_sint f16:$Rn)))),
def : Pat<(f16 (any_uint_to_fp (i32 (any_fp_to_uint f16:$Rn)))),
(UCVTFv1i16 (f16 (FCVTZUv1f16 f16:$Rn)))>;
}
+
+// int -> float conversion of value in lane 0 of simd vector should use
+// correct cvtf variant to avoid costly fpr <-> gpr register transfers.
+def : Pat<(f32 (sint_to_fp (i32 (vector_extract (v4i32 FPR128:$Rn), (i64 0))))),
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davemgreen wrote:
Ah I see. I mis-read where the above predicate got closed.
https://github.com/llvm/llvm-project/pull/98602
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