[llvm] [NVPTX] Propagate truncate to operands (PR #98666)

[Artem Belevich via llvm-commits]

================
@@ -5541,6 +5541,53 @@ static SDValue PerformREMCombine(SDNode *N,
   return SDValue();
 }
 
+// truncate (logic_op x, y) --> logic_op (truncate x), (truncate y)
+// This will reduce register pressure.
+static SDValue PerformTruncCombine(SDNode *N,
+                                   TargetLowering::DAGCombinerInfo &DCI) {
+  if (!DCI.isBeforeLegalizeOps())
+    return SDValue();
+
+  SDValue LogicalOp = N->getOperand(0);
+  switch (LogicalOp.getOpcode()) {
+  default:
+    break;
+  case ISD::ADD:
+  case ISD::SUB:
+  case ISD::MUL:
+  case ISD::AND:
+  case ISD::OR:
+  case ISD::XOR: {
+    EVT VT = N->getValueType(0);
+    EVT LogicalVT = LogicalOp.getValueType();
+    if (VT != MVT::i32 || LogicalVT != MVT::i64)
----------------
Artem-B wrote:

Nit: I find positive assertions easier to read and reason about.
E.g: `if (!(VT == MVT::i32 && LogicalVT == MVT::i64)) return;` makes it clear what specifically we're looking for, as opposed to "return if any of the factors is wrong" requiring additional mental effort to figure out what's left after we've ruled out the wrong parts.

With only two parameters it's not a big deal either way, so I'll leave it up to you.

https://github.com/llvm/llvm-project/pull/98666