[llvm] 3cf4a50 - [InstCombine] Add tests for transforming `(or/and (icmp eq/ne X,0),(icmp eq/ne X,Pow2OrZero))`; NFC
Noah Goldstein via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 12 11:34:57 PDT 2024
Author: Noah Goldstein
Date: 2024-07-13T02:34:38+08:00
New Revision: 3cf4a508f4b929c794d46ab25b4d42bae5bbf219
URL: https://github.com/llvm/llvm-project/commit/3cf4a508f4b929c794d46ab25b4d42bae5bbf219
DIFF: https://github.com/llvm/llvm-project/commit/3cf4a508f4b929c794d46ab25b4d42bae5bbf219.diff
LOG: [InstCombine] Add tests for transforming `(or/and (icmp eq/ne X,0),(icmp eq/ne X,Pow2OrZero))`; NFC
Added:
Modified:
llvm/test/Transforms/InstCombine/and-or-icmps.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/and-or-icmps.ll b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
index c20f48a985b3e..2ee0cf98d032a 100644
--- a/llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -3057,9 +3057,9 @@ define i32 @icmp_slt_0_or_icmp_add_1_sge_100_i32_fail(i32 %x) {
define i1 @logical_and_icmps1(i32 %a, i1 %other_cond) {
; CHECK-LABEL: @logical_and_icmps1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[A:%.*]], 10086
-; CHECK-NEXT: [[RET2:%.*]] = select i1 [[RET1:%.*]], i1 [[CMP3]], i1 false
-; CHECK-NEXT: ret i1 [[RET2]]
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[A:%.*]], 10086
+; CHECK-NEXT: [[RET:%.*]] = select i1 [[OTHER_COND:%.*]], i1 [[TMP0]], i1 false
+; CHECK-NEXT: ret i1 [[RET]]
;
entry:
%cmp1 = icmp sgt i32 %a, -1
@@ -3085,9 +3085,9 @@ entry:
define <4 x i1> @logical_and_icmps_vec1(<4 x i32> %a, <4 x i1> %other_cond) {
; CHECK-LABEL: @logical_and_icmps_vec1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
-; CHECK-NEXT: [[RET2:%.*]] = select <4 x i1> [[RET1:%.*]], <4 x i1> [[CMP3]], <4 x i1> zeroinitializer
-; CHECK-NEXT: ret <4 x i1> [[RET2]]
+; CHECK-NEXT: [[TMP0:%.*]] = icmp ult <4 x i32> [[A:%.*]], <i32 10086, i32 10086, i32 10086, i32 10086>
+; CHECK-NEXT: [[RET:%.*]] = select <4 x i1> [[OTHER_COND:%.*]], <4 x i1> [[TMP0]], <4 x i1> zeroinitializer
+; CHECK-NEXT: ret <4 x i1> [[RET]]
;
entry:
%cmp1 = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1 >
@@ -3113,3 +3113,225 @@ entry:
%ret = select i1 %logical_and, i1 %cmp2, i1 false
ret i1 %ret
}
+
+
+define i1 @icmp_eq_or_z_or_pow2orz(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[CP2]], [[C0]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = or i1 %cp2, %c0
+ ret i1 %r
+}
+
+
+define i1 @icmp_eq_or_z_or_pow2orz_logical(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_logical(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[CP2]], [[C0]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = select i1 %cp2, i1 true, i1 %c0
+ ret i1 %r
+}
+
+
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_multiuse(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_multiuse(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: call void @use(i1 [[C0]])
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ call void @use(i1 %c0)
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_logic_or(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_logic_or(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C0]], i1 true, i1 [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = select i1 %c0, i1 true, i1 %cp2
+ ret i1 %r
+}
+
+
+define <2 x i1> @icmp_ne_and_z_and_pow2orz(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz(
+; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[C0]], [[CP2]]
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %ny = sub <2 x i8> zeroinitializer, %y
+ %pow2orz = and <2 x i8> %ny, %y
+
+ %c0 = icmp ne <2 x i8> %x, zeroinitializer
+ %cp2 = icmp ne <2 x i8> %x, %pow2orz
+ %r = and <2 x i1> %c0, %cp2
+ ret <2 x i1> %r
+}
+
+
+define i1 @icmp_ne_and_z_and_onefail(i8 %x) {
+; CHECK-LABEL: @icmp_ne_and_z_and_onefail(
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X:%.*]], 2
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %c0 = icmp ne i8 %x, 0
+ %cp2 = icmp ne i8 %x, 1
+ %cp3 = icmp ne i8 %x, 2
+ %rr = and i1 %c0, %cp2
+ %r = and i1 %rr, %cp3
+ ret i1 %r
+}
+
+define i1 @icmp_ne_and_z_and_pow2orz_fail_multiuse1(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_multiuse1(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: call void @use(i1 [[C0]])
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ call void @use(i1 %c0)
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+
+define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_logic_and(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_logic_and(
+; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[CP2:%.*]] = icmp ne <2 x i8> [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C0]], <2 x i1> [[CP2]], <2 x i1> zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %ny = sub <2 x i8> zeroinitializer, %y
+ %pow2orz = and <2 x i8> %ny, %y
+
+ %c0 = icmp ne <2 x i8> %x, zeroinitializer
+ %cp2 = icmp ne <2 x i8> %x, %pow2orz
+ %r = select <2 x i1> %c0, <2 x i1> %cp2, <2 x i1> zeroinitializer
+ ret <2 x i1> %r
+}
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_not_pow2(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_not_pow2(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 1, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 0
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 1, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 0
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_nonzero_const(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp eq i8 [[X:%.*]], 1
+; CHECK-NEXT: [[CP2:%.*]] = icmp eq i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp eq i8 %x, 1
+ %cp2 = icmp eq i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
+
+define <2 x i1> @icmp_ne_and_z_and_pow2orz_fail_bad_pred(<2 x i8> %x, <2 x i8> %y) {
+; CHECK-LABEL: @icmp_ne_and_z_and_pow2orz_fail_bad_pred(
+; CHECK-NEXT: [[NY:%.*]] = sub <2 x i8> zeroinitializer, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and <2 x i8> [[NY]], [[Y]]
+; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i8> [[POW2ORZ]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[R]]
+;
+ %ny = sub <2 x i8> zeroinitializer, %y
+ %pow2orz = and <2 x i8> %ny, %y
+
+ %c0 = icmp eq <2 x i8> %x, zeroinitializer
+ %cp2 = icmp eq <2 x i8> %x, %pow2orz
+ %r = and <2 x i1> %c0, %cp2
+ ret <2 x i1> %r
+}
+
+define i1 @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(i8 %x, i8 %y) {
+; CHECK-LABEL: @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(
+; CHECK-NEXT: [[NY:%.*]] = sub i8 0, [[Y:%.*]]
+; CHECK-NEXT: [[POW2ORZ:%.*]] = and i8 [[NY]], [[Y]]
+; CHECK-NEXT: [[C0:%.*]] = icmp slt i8 [[X:%.*]], 1
+; CHECK-NEXT: [[CP2:%.*]] = icmp sge i8 [[POW2ORZ]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = or i1 [[C0]], [[CP2]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %ny = sub i8 0, %y
+ %pow2orz = and i8 %ny, %y
+
+ %c0 = icmp sle i8 %x, 0
+ %cp2 = icmp sle i8 %x, %pow2orz
+ %r = or i1 %c0, %cp2
+ ret i1 %r
+}
More information about the llvm-commits
mailing list