[llvm] dd4658f - [AArch64] Add a few more umull / umaddl test case. NFC

David Green via llvm-commits llvm-commits at lists.llvm.org
Fri Jul 12 07:14:15 PDT 2024


Author: David Green
Date: 2024-07-12T15:14:11+01:00
New Revision: dd4658f660ad6a9876df1ba375b5d2af5d07b0ad

URL: https://github.com/llvm/llvm-project/commit/dd4658f660ad6a9876df1ba375b5d2af5d07b0ad
DIFF: https://github.com/llvm/llvm-project/commit/dd4658f660ad6a9876df1ba375b5d2af5d07b0ad.diff

LOG: [AArch64] Add a few more umull / umaddl test case. NFC

>From #98481.

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll b/llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
index 058cbbe9ff13c..e4b534bfe0e37 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-mull-masks.ll
@@ -1395,3 +1395,55 @@ entry:
   %sub = sub i64 %c, %mul
   ret i64 %sub
 }
+
+define i64 @umull_and_lshr(i64 %x) {
+; CHECK-LABEL: umull_and_lshr:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    lsr x8, x0, #32
+; CHECK-NEXT:    and x9, x0, #0xffffffff
+; CHECK-NEXT:    umull x0, w9, w8
+; CHECK-NEXT:    ret
+    %lo = and i64 %x, u0xffffffff
+    %hi = lshr i64 %x, 32
+    %mul = mul i64 %lo, %hi
+    ret i64 %mul
+}
+
+define i64 @umull_and_and(i64 %x, i64 %y) {
+; CHECK-LABEL: umull_and_and:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    umull x0, w0, w1
+; CHECK-NEXT:    ret
+    %lo = and i64 %x, u0xffffffff
+    %hi = and i64 %y, u0xffffffff
+    %mul = mul i64 %lo, %hi
+    ret i64 %mul
+}
+
+define i64 @umaddl_and_lshr(i64 %x, i64 %a) {
+; CHECK-LABEL: umaddl_and_lshr:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    lsr x8, x0, #32
+; CHECK-NEXT:    and x9, x0, #0xffffffff
+; CHECK-NEXT:    umaddl x0, w9, w8, x1
+; CHECK-NEXT:    ret
+    %lo = and i64 %x, u0xffffffff
+    %hi = lshr i64 %x, 32
+    %mul = mul i64 %lo, %hi
+    %add = add i64 %a, %mul
+    ret i64 %add
+}
+
+define i64 @umaddl_and_and(i64 %x, i64 %y, i64 %a) {
+; CHECK-LABEL: umaddl_and_and:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    and x8, x0, #0xffffffff
+; CHECK-NEXT:    and x9, x1, #0xffffffff
+; CHECK-NEXT:    umaddl x0, w8, w9, x2
+; CHECK-NEXT:    ret
+    %lo = and i64 %x, u0xffffffff
+    %hi = and i64 %y, u0xffffffff
+    %mul = mul i64 %lo, %hi
+    %add = add i64 %a, %mul
+    ret i64 %add
+}


        


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