[llvm] [CodeGen][NewPM] Port `MachineVerifier` to new pass manager (PR #98628)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 12 06:15:00 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: None (paperchalice)
<details>
<summary>Changes</summary>
- Add `MachineVerifierPass`.
- Use complete `MachineVerifierPass` in `VerifyInstrumentation` if possible.
`LiveStacksAnalysis` will be added in future, all other analyses are done.
---
Patch is 23.01 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/98628.diff
24 Files Affected:
- (added) llvm/include/llvm/CodeGen/MachineVerifier.h (+28)
- (modified) llvm/include/llvm/InitializePasses.h (+1-1)
- (modified) llvm/include/llvm/Passes/MachinePassRegistry.def (+1)
- (modified) llvm/include/llvm/Passes/StandardInstrumentations.h (+2-1)
- (modified) llvm/lib/CodeGen/CodeGen.cpp (+1-1)
- (modified) llvm/lib/CodeGen/MachineVerifier.cpp (+36-8)
- (modified) llvm/lib/Passes/PassBuilder.cpp (+1)
- (modified) llvm/lib/Passes/StandardInstrumentations.cpp (+17-8)
- (modified) llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir (+3)
- (modified) llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-image.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir (+2)
- (modified) llvm/test/CodeGen/AMDGPU/verify-sop.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir (+1)
- (modified) llvm/test/CodeGen/AMDGPU/verify-vopd.mir (+1)
- (modified) llvm/test/CodeGen/MIR/Generic/dbg-value-missing-loc.mir (+1)
- (modified) llvm/test/CodeGen/MIR/X86/dbg-value-list.mir (+1)
- (modified) llvm/test/CodeGen/RISCV/verify-instr.mir (+1)
- (modified) llvm/tools/llc/NewPMDriver.cpp (+1-1)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/MachineVerifier.h b/llvm/include/llvm/CodeGen/MachineVerifier.h
new file mode 100644
index 0000000000000..bfd0681fb7954
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/MachineVerifier.h
@@ -0,0 +1,28 @@
+//===- llvm/CodeGen/MachineVerifier.h - Machine Code Verifier ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_MACHINEVERIFIER_H
+#define LLVM_CODEGEN_MACHINEVERIFIER_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+#include <string>
+
+namespace llvm {
+class MachineVerifierPass : public PassInfoMixin<MachineVerifierPass> {
+ std::string Banner;
+
+public:
+ MachineVerifierPass(const std::string &Banner = std::string())
+ : Banner(Banner) {}
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_MACHINEVERIFIER_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 8979fcd95aa9a..c9dc8ac2e5d11 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -208,7 +208,7 @@ void initializeMachineSinkingPass(PassRegistry&);
void initializeMachineTraceMetricsPass(PassRegistry&);
void initializeMachineUniformityInfoPrinterPassPass(PassRegistry &);
void initializeMachineUniformityAnalysisPassPass(PassRegistry &);
-void initializeMachineVerifierPassPass(PassRegistry&);
+void initializeMachineVerifierLegacyPassPass(PassRegistry &);
void initializeMemoryDependenceWrapperPassPass(PassRegistry&);
void initializeMemorySSAWrapperPassPass(PassRegistry&);
void initializeMergeICmpsLegacyPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index d5cd8d4a132fc..e4b8c288021b3 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -148,6 +148,7 @@ MACHINE_FUNCTION_PASS("print<slot-indexes>", SlotIndexesPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("require-all-machine-function-properties",
RequireAllMachineFunctionPropertiesPass())
MACHINE_FUNCTION_PASS("trigger-verifier-error", TriggerVerifierErrorPass())
+MACHINE_FUNCTION_PASS("verify", MachineVerifierPass())
#undef MACHINE_FUNCTION_PASS
#ifndef MACHINE_FUNCTION_PASS_WITH_PARAMS
diff --git a/llvm/include/llvm/Passes/StandardInstrumentations.h b/llvm/include/llvm/Passes/StandardInstrumentations.h
index 84d1b541171bf..fa9c744294a66 100644
--- a/llvm/include/llvm/Passes/StandardInstrumentations.h
+++ b/llvm/include/llvm/Passes/StandardInstrumentations.h
@@ -461,7 +461,8 @@ class VerifyInstrumentation {
public:
VerifyInstrumentation(bool DebugLogging) : DebugLogging(DebugLogging) {}
- void registerCallbacks(PassInstrumentationCallbacks &PIC);
+ void registerCallbacks(PassInstrumentationCallbacks &PIC,
+ ModuleAnalysisManager *MAM);
};
/// This class implements --time-trace functionality for new pass manager.
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index ccd8f76fb4f63..f67244d280c9e 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -97,7 +97,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMachineSinkingPass(Registry);
initializeMachineUniformityAnalysisPassPass(Registry);
initializeMachineUniformityInfoPrinterPassPass(Registry);
- initializeMachineVerifierPassPass(Registry);
+ initializeMachineVerifierLegacyPassPass(Registry);
initializeObjCARCContractLegacyPassPass(Registry);
initializeOptimizePHIsPass(Registry);
initializePEIPass(Registry);
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index d0d3af0e5e4fc..0a5b8bdbc9371 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -20,6 +20,7 @@
// -verify-machineinstrs.
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
@@ -93,6 +94,9 @@ using namespace llvm;
namespace {
struct MachineVerifier {
+ MachineVerifier(MachineFunctionAnalysisManager &MFAM, const char *b)
+ : MFAM(&MFAM), Banner(b) {}
+
MachineVerifier(Pass *pass, const char *b) : PASS(pass), Banner(b) {}
MachineVerifier(const char *b, LiveVariables *LiveVars,
@@ -103,6 +107,7 @@ namespace {
unsigned verify(const MachineFunction &MF);
+ MachineFunctionAnalysisManager *MFAM = nullptr;
Pass *const PASS = nullptr;
const char *Banner;
const MachineFunction *MF = nullptr;
@@ -302,15 +307,15 @@ namespace {
void verifyProperties(const MachineFunction &MF);
};
- struct MachineVerifierPass : public MachineFunctionPass {
+ struct MachineVerifierLegacyPass : public MachineFunctionPass {
static char ID; // Pass ID, replacement for typeid
const std::string Banner;
- MachineVerifierPass(std::string banner = std::string())
- : MachineFunctionPass(ID), Banner(std::move(banner)) {
- initializeMachineVerifierPassPass(*PassRegistry::getPassRegistry());
- }
+ MachineVerifierLegacyPass(std::string banner = std::string())
+ : MachineFunctionPass(ID), Banner(std::move(banner)) {
+ initializeMachineVerifierLegacyPassPass(*PassRegistry::getPassRegistry());
+ }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addUsedIfAvailable<LiveStacks>();
@@ -338,13 +343,28 @@ namespace {
} // end anonymous namespace
-char MachineVerifierPass::ID = 0;
+PreservedAnalyses
+MachineVerifierPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ // Skip functions that have known verification problems.
+ // FIXME: Remove this mechanism when all problematic passes have been
+ // fixed.
+ if (MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::FailsVerification))
+ return PreservedAnalyses::all();
+ unsigned FoundErrors = MachineVerifier(MFAM, Banner.c_str()).verify(MF);
+ if (FoundErrors)
+ report_fatal_error("Found " + Twine(FoundErrors) + " machine code errors.");
+ return PreservedAnalyses::all();
+}
+
+char MachineVerifierLegacyPass::ID = 0;
-INITIALIZE_PASS(MachineVerifierPass, "machineverifier",
+INITIALIZE_PASS(MachineVerifierLegacyPass, "machineverifier",
"Verify generated machine code", false, false)
FunctionPass *llvm::createMachineVerifierPass(const std::string &Banner) {
- return new MachineVerifierPass(Banner);
+ return new MachineVerifierLegacyPass(Banner);
}
void llvm::verifyMachineFunction(const std::string &Banner,
@@ -438,6 +458,14 @@ unsigned MachineVerifier::verify(const MachineFunction &MF) {
auto *SIWrapper = PASS->getAnalysisIfAvailable<SlotIndexesWrapperPass>();
Indexes = SIWrapper ? &SIWrapper->getSI() : nullptr;
}
+ if (MFAM) {
+ MachineFunction &Func = const_cast<MachineFunction &>(MF);
+ LiveInts = MFAM->getCachedResult<LiveIntervalsAnalysis>(Func);
+ if (!LiveInts)
+ LiveVars = MFAM->getCachedResult<LiveVariablesAnalysis>(Func);
+ // TODO: LiveStks = MFAM->getCachedResult<LiveStacksAnalysis>(Func);
+ Indexes = MFAM->getCachedResult<SlotIndexesAnalysis>(Func);
+ }
verifySlotIndexes();
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index d4eca4a48e55d..573aa9837701d 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -103,6 +103,7 @@
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
#include "llvm/CodeGen/RegAllocFast.h"
#include "llvm/CodeGen/SafeStack.h"
diff --git a/llvm/lib/Passes/StandardInstrumentations.cpp b/llvm/lib/Passes/StandardInstrumentations.cpp
index 2ed0e237d8de7..fc7b82d522bf0 100644
--- a/llvm/lib/Passes/StandardInstrumentations.cpp
+++ b/llvm/lib/Passes/StandardInstrumentations.cpp
@@ -22,6 +22,7 @@
#include "llvm/CodeGen/MIRPrinter.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
+#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/Demangle/Demangle.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Function.h"
@@ -1451,10 +1452,10 @@ void PreservedCFGCheckerInstrumentation::registerCallbacks(
});
}
-void VerifyInstrumentation::registerCallbacks(
- PassInstrumentationCallbacks &PIC) {
+void VerifyInstrumentation::registerCallbacks(PassInstrumentationCallbacks &PIC,
+ ModuleAnalysisManager *MAM) {
PIC.registerAfterPassCallback(
- [this](StringRef P, Any IR, const PreservedAnalyses &PassPA) {
+ [this, MAM](StringRef P, Any IR, const PreservedAnalyses &PassPA) {
if (isIgnored(P) || P == "VerifierPass")
return;
const auto *F = unwrapIR<Function>(IR);
@@ -1488,15 +1489,23 @@ void VerifyInstrumentation::registerCallbacks(
P));
}
- // TODO: Use complete MachineVerifierPass.
if (auto *MF = unwrapIR<MachineFunction>(IR)) {
if (DebugLogging)
dbgs() << "Verifying machine function " << MF->getName() << '\n';
- verifyMachineFunction(
+ std::string Banner =
formatv("Broken machine function found after pass "
"\"{0}\", compilation aborted!",
- P),
- *MF);
+ P);
+ if (MAM) {
+ Module &M = const_cast<Module &>(*MF->getFunction().getParent());
+ auto &MFAM =
+ MAM->getResult<MachineFunctionAnalysisManagerModuleProxy>(M)
+ .getManager();
+ MachineVerifierPass Verifier(Banner);
+ Verifier.run(const_cast<MachineFunction &>(*MF), MFAM);
+ } else {
+ verifyMachineFunction(Banner, *MF);
+ }
}
}
});
@@ -2515,7 +2524,7 @@ void StandardInstrumentations::registerCallbacks(
PrintChangedIR.registerCallbacks(PIC);
PseudoProbeVerification.registerCallbacks(PIC);
if (VerifyEach)
- Verify.registerCallbacks(PIC);
+ Verify.registerCallbacks(PIC, MAM);
PrintChangedDiff.registerCallbacks(PIC);
WebsiteChangeReporter.registerCallbacks(PIC);
ChangeTester.registerCallbacks(PIC);
diff --git a/llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir b/llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir
index 2066637a34af0..a139a2e338984 100644
--- a/llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir
+++ b/llvm/test/CodeGen/AMDGPU/verifier-sdwa-cvt.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx940 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx940 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" %s
# CHECK: *** Bad machine code: sext, abs and neg are not allowed on this instruction ***
# CHECK: $vgpr0 = V_CVT_F32_FP8_sdwa 1, $vgpr0, 0, 0, 4, implicit $mode, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir b/llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
index 790ecd21e21f7..81d17a8fd0f90 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-constant-bus-violations.mir
@@ -1,6 +1,9 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX9-ERR %s
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX10PLUS-ERR %s
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX10PLUS-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx900 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX9-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX10PLUS-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -implicit-check-not="Bad machine code" -check-prefix=GFX10PLUS-ERR %s
# GFX9-ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
# GFX9-ERR: $vgpr0 = V_CNDMASK_B32_e64 0, $sgpr0, 0, -1, killed $sgpr0_sgpr1, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir b/llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
index bdb273cba79c6..e5521ee3efb4e 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-ds-gws-align.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx90a -run-pass=machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX90A-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx90a --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX90A-ERR %s
# GFX90A-ERR: *** Bad machine code: Subtarget requires even aligned vector registers for DS_GWS instructions ***
# GFX90A-ERR: DS_GWS_INIT killed %0.sub1:areg_128_align2, 0, implicit $m0, implicit $exec :: (store (s32) into custom "GWSResource")
diff --git a/llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir b/llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
index da389743daf3a..a13d601f79fd4 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-duplicate-literal.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass machineverifier -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 --passes='machine-function(verify)' -o - %s | FileCheck %s
# Two uses of the same literal only count as one use of the constant bus.
diff --git a/llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir b/llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
index 12ed2895012b6..c4c1dcf242a5a 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-gfx90a-aligned-vgprs.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=machineverifier -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx90a --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck %s
# Implicit uses are OK.
---
diff --git a/llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir b/llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir
index ca6fa25d8c919..dcdc105724a2e 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-image-vaddr-align.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx90a -run-pass=machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX90A-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx90a --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX90A-ERR %s
# GFX90A-ERR: *** Bad machine code: Subtarget requires even aligned vector registers for vaddr operand of image instructions ***
# GFX90A-ERR: %4:vgpr_32 = IMAGE_SAMPLE_V1_V1_gfx90a %0.sub1:vreg_128_align2
diff --git a/llvm/test/CodeGen/AMDGPU/verify-image.mir b/llvm/test/CodeGen/AMDGPU/verify-image.mir
index 5bb7303968a7e..98eaec600aeb1 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-image.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-image.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX11-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1100 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX11-ERR %s
---
name: image_verify
diff --git a/llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir b/llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
index 3184bbd8bd2b0..6fc399b1da342 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-scalar-store.mir
@@ -1,5 +1,7 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=tonga -run-pass=machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX8-ERR %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=machineverifier -o - %s 2>&1 | FileCheck -check-prefix=GFX9 %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=tonga --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX8-ERR %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx900 --passes='machine-function(verify)' -o - %s 2>&1 | FileCheck -check-prefix=GFX9 %s
# GFX8-ERR: *** Bad machine code: scalar stores must use m0 as offset register ***
# GFX9: S_STORE_DWORD_SGPR
diff --git a/llvm/test/CodeGen/AMDGPU/verify-sop.mir b/llvm/test/CodeGen/AMDGPU/verify-sop.mir
index 149b6484290d8..e7fc19e9c9cc4 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-sop.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-sop.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -run-pass machineverifier %s -o - 2>&1 | FileCheck %s
+# RUN: not --crash llc -mtriple=amdgcn --passes='machine-function(verify)' %s -o - 2>&1 | FileCheck %s
# CHECK: *** Bad machine code: SOP2/SOPC instruction requires too many immediate constants
# CHECK: - instruction: %0:sreg_32_xm0 = S_ADD_I32
diff --git a/llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir b/llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
index 12caf08338f44..845a17df4e8b6 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-vimage-vsample.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX12-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1200 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX12-ERR %s
---
name: vimage_vsample_verify
diff --git a/llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir b/llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
index 6614d8f9c4b09..6c55183bb5287 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-vopd-gfx12.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,-wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX12-ERR %s
+# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,-wavefrontsize64 --passes='machine-function(verify)' -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX12-ERR %s
# GFX12-ERR: *** Bad machine code: VOP* instruction violates constant bus restriction ***
# GFX12-ERR: $vgpr2, $vgpr3 = V_DUAL_CNDMASK_B32_e32_X_MUL_F32_e32_gfx12 $sgpr0, $vgpr0, $sgpr1, $vgpr1, implicit $exec, implicit $mode, implicit $vcc_lo, implicit $vcc_lo
diff --git a/llvm/test/CodeGen/AMDGPU/verify-vopd.mir b/llvm/test/CodeGen/AMDGPU/verify-vopd.mir
index 374f898957193..dc7d4afa85741 100644
--- a/llvm/test/CodeGen/AMDGPU/verify-vopd.mir
+++ b/llvm/test/CodeGen/AMDGPU/verify-vopd.mir
@@ -1,4 +1,5 @@
# RUN: not --crash llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-wavefrontsize64 -run-pass machineverifier -o /dev/null %s 2>&1 | FileCheck -check-prefix=GFX11-ERR %s
+# RUN: not --cr...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/98628
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