[llvm] Allow MAY(R)? to accept the high components of register pairs (PR #98606)

[Dominik Steenken via llvm-commits]

https://github.com/dominik-steenken created https://github.com/llvm/llvm-project/pull/98606

The HFP instructions `MAY` and `MAYR`, unlike any other floating point instructions, allow the specification of a 128bit register pair by either the lower-numbered or the higher-numbered component register. In order to support this, but change as little about codegen as possible, the existing `MAY(R)?` definition is made `CodeGenOnly`, while a copy is provided for the assembler and disassembler, which simply accepts a 64bit floating point register in place of the 128bit one. This copy is stripped of its pattern to prevent codegen from using it.
The corresponding assembly tests that checked the register specification rule that this commit removes from `MAY(R)?` have also been removed.

>From a2c934ab7754597d60e0e108d669f1da9835afe1 Mon Sep 17 00:00:00 2001
From: Dominik Steenken <dost at de.ibm.com>
Date: Thu, 4 Jul 2024 11:06:28 +0200
Subject: [PATCH] [SystemZ] Allow MAY(R)? to accept the high components of
 register pairs The HFP instructions MAY and MAYR, unlike any other floating
 point instructions, allow the specification of a 128bit register pair by
 either the lower-numbered or the higher-numbered component register. In order
 to support this, but change as little about codegen as possible, the existing
 MAY(R) definition is made `CodeGenOnly`, while a copy is provided for the
 assembler and disassembler, which simply accepts a 64bit floating point
 register in place of the 128bit one. This copy is stripped of its pattern to
 prevent codegen from using it. The corresponding assembly tests that checked
 the register specification rule that this commit removes from MAY(R)? have
 also been removed.

---
 llvm/lib/Target/SystemZ/SystemZInstrHFP.td | 17 +++++++++++++++--
 llvm/test/MC/SystemZ/insn-bad.s            |  8 --------
 2 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/SystemZ/SystemZInstrHFP.td b/llvm/lib/Target/SystemZ/SystemZInstrHFP.td
index d2e05b63c6c63..965dfddb7ef0f 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrHFP.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrHFP.td
@@ -209,13 +209,26 @@ def MYH  : BinaryRXF<"myh",  0xED3D, null_frag, FP64,  FP64, z_load, 8>;
 def MYL  : BinaryRXF<"myl",  0xED39, null_frag, FP64,  FP64, z_load, 8>;
 
 // Fused multiply-add (unnormalized).
-def MAYR  : TernaryRRD<"mayr",  0xB33A, null_frag, FP128, FP64>;
 def MAYHR : TernaryRRD<"mayhr", 0xB33C, null_frag, FP64,  FP64>;
 def MAYLR : TernaryRRD<"maylr", 0xB338, null_frag, FP64,  FP64>;
-def MAY   : TernaryRXF<"may",   0xED3A, null_frag, FP128, FP64, z_load, 8>;
 def MAYH  : TernaryRXF<"mayh",  0xED3C, null_frag, FP64,  FP64, z_load, 8>;
 def MAYL  : TernaryRXF<"mayl",  0xED38, null_frag, FP64,  FP64, z_load, 8>;
 
+// MAY and MAYR allow the user to specify the floating point register pair making 
+// up the FP128 register by either the lower-numbered register or the higher-numbered
+// register, in contrast to all other floating point instructions. For this
+// reason, the codegen and assembly versions of this instruction are kept separate
+// in order to allow the assembler and disassembler to accept these registers
+// without having to fundamentally change the instruction itself.
+let isCodeGenOnly = 1 in {
+  def MAY   : TernaryRXF<"may",   0xED3A, null_frag, FP128, FP64, z_load, 8>;
+  def MAYR  : TernaryRRD<"mayr",  0xB33A, null_frag, FP128, FP64>;
+}
+let hasNoSchedulingInfo = 1, OpKey = "", OpType = "", Pattern = [] <dag> in {
+  def MAY_Asm   : TernaryRXF<"may",   0xED3A, null_frag, FP64, FP64, z_load, 8>;
+  def MAYR_Asm  : TernaryRRD<"mayr",  0xB33A, null_frag, FP64, FP64>;
+}
+
 // Division.
 def DER : BinaryRR <"der", 0x3D,   null_frag, FP32,  FP32>;
 def DDR : BinaryRR <"ddr", 0x2D,   null_frag, FP64,  FP64>;
diff --git a/llvm/test/MC/SystemZ/insn-bad.s b/llvm/test/MC/SystemZ/insn-bad.s
index 6f94731fa0871..f81278610c73a 100644
--- a/llvm/test/MC/SystemZ/insn-bad.s
+++ b/llvm/test/MC/SystemZ/insn-bad.s
@@ -4176,12 +4176,9 @@
 #CHECK: may	%f0, %f0, -1
 #CHECK: error: invalid operand
 #CHECK: may	%f0, %f0, 4096
-#CHECK: error: invalid register pair
-#CHECK: may	%f2, %f0, 0
 
 	may	%f0, %f0, -1
 	may	%f0, %f0, 4096
-	may	%f2, %f0, 0
 
 #CHECK: error: invalid operand
 #CHECK: mayh	%f0, %f0, -1
@@ -4199,11 +4196,6 @@
 	mayl	%f0, %f0, -1
 	mayl	%f0, %f0, 4096
 
-#CHECK: error: invalid register pair
-#CHECK: mayr	%f2, %f0, %f0
-
-	mayr	%f2, %f0, %f0
-
 #CHECK: error: invalid operand
 #CHECK: mc	-1, 0
 #CHECK: error: invalid operand