[llvm] 4570a34 - [CodeGen] Use range-based for loops (NFC) (#98459)

[via llvm-commits]

Author: Kazu Hirata
Date: 2024-07-12T01:37:15-07:00
New Revision: 4570a34f929693e442c7d09dc6aef7e801c2dc1d

URL: https://github.com/llvm/llvm-project/commit/4570a34f929693e442c7d09dc6aef7e801c2dc1d
DIFF: https://github.com/llvm/llvm-project/commit/4570a34f929693e442c7d09dc6aef7e801c2dc1d.diff

LOG: [CodeGen] Use range-based for loops (NFC) (#98459)

Added: 
    

Modified: 
    llvm/lib/CodeGen/AllocationOrder.cpp
    llvm/lib/CodeGen/MachineBasicBlock.cpp
    llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/AllocationOrder.cpp b/llvm/lib/CodeGen/AllocationOrder.cpp
index 2aef1234ac0ed..27a4a6cd85712 100644
--- a/llvm/lib/CodeGen/AllocationOrder.cpp
+++ b/llvm/lib/CodeGen/AllocationOrder.cpp
@@ -39,15 +39,13 @@ AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM,
   LLVM_DEBUG({
     if (!Hints.empty()) {
       dbgs() << "hints:";
-      for (unsigned I = 0, E = Hints.size(); I != E; ++I)
-        dbgs() << ' ' << printReg(Hints[I], TRI);
+      for (MCPhysReg Hint : Hints)
+        dbgs() << ' ' << printReg(Hint, TRI);
       dbgs() << '\n';
     }
   });
-#ifndef NDEBUG
-  for (unsigned I = 0, E = Hints.size(); I != E; ++I)
-    assert(is_contained(Order, Hints[I]) &&
-           "Target hint is outside allocation order.");
-#endif
+  assert(all_of(Hints,
+                [&](MCPhysReg Hint) { return is_contained(Order, Hint); }) &&
+         "Target hint is outside allocation order.");
   return AllocationOrder(std::move(Hints), Order, HardHints);
 }

diff  --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 5fe7a9d35dc9a..90d2edebedd72 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1484,10 +1484,9 @@ void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
 
     // Scan the operands of this machine instruction, replacing any uses of Old
     // with New.
-    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
-      if (I->getOperand(i).isMBB() &&
-          I->getOperand(i).getMBB() == Old)
-        I->getOperand(i).setMBB(New);
+    for (MachineOperand &MO : I->operands())
+      if (MO.isMBB() && MO.getMBB() == Old)
+        MO.setMBB(New);
   }
 
   // Update the successor information.

diff  --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
index 5522c25be3949..de4a1ac2a3baf 100644
--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
@@ -622,11 +622,11 @@ void ScheduleDAGFast::ListScheduleBottomUp() {
     }
 
     // Add the nodes that aren't ready back onto the available list.
-    for (unsigned i = 0, e = NotReady.size(); i != e; ++i) {
-      NotReady[i]->isPending = false;
+    for (SUnit *SU : NotReady) {
+      SU->isPending = false;
       // May no longer be available due to backtracking.
-      if (NotReady[i]->isAvailable)
-        AvailableQueue.push(NotReady[i]);
+      if (SU->isAvailable)
+        AvailableQueue.push(SU);
     }
     NotReady.clear();