[llvm] e8e2cff - [X86][CodeGen] Fix an incorrect pattern for CCMP/CTEST with imm64

[Shengchen Kan via llvm-commits]

Author: Shengchen Kan
Date: 2024-07-11T23:11:02+08:00
New Revision: e8e2cff1607627e52079741af368064cea3e28d4

URL: https://github.com/llvm/llvm-project/commit/e8e2cff1607627e52079741af368064cea3e28d4
DIFF: https://github.com/llvm/llvm-project/commit/e8e2cff1607627e52079741af368064cea3e28d4.diff

LOG: [X86][CodeGen] Fix an incorrect pattern for CCMP/CTEST with imm64

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86InstrConditionalCompare.td
    llvm/test/CodeGen/X86/apx/ccmp.ll
    llvm/test/CodeGen/X86/apx/ctest.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86InstrConditionalCompare.td b/llvm/lib/Target/X86/X86InstrConditionalCompare.td
index 3d296773103b5..35af8405f1abe 100644
--- a/llvm/lib/Target/X86/X86InstrConditionalCompare.td
+++ b/llvm/lib/Target/X86/X86InstrConditionalCompare.td
@@ -93,8 +93,8 @@ def : Pat<(X86ccmp GR16:$src1, (i16 imm:$src2), timm:$dcf, timm:$cond, EFLAGS),
           (CCMP16ri GR16:$src1, imm:$src2, timm:$dcf, timm:$cond)>;
 def : Pat<(X86ccmp GR32:$src1, (i32 imm:$src2), timm:$dcf, timm:$cond, EFLAGS),
           (CCMP32ri GR32:$src1, imm:$src2, timm:$dcf, timm:$cond)>;
-def : Pat<(X86ccmp GR64:$src1, (i64 imm:$src2), timm:$dcf, timm:$cond, EFLAGS),
-          (CCMP64ri32 GR64:$src1, imm:$src2, timm:$dcf, timm:$cond)>;
+def : Pat<(X86ccmp GR64:$src1, i64immSExt32_su:$src2, timm:$dcf, timm:$cond, EFLAGS),
+          (CCMP64ri32 GR64:$src1, i64immSExt32_su:$src2, timm:$dcf, timm:$cond)>;
 
 def : Pat<(X86ccmp GR8:$src1, (loadi8 addr:$src2), timm:$dcf, timm:$cond, EFLAGS),
           (CCMP8rm GR8:$src1, addr:$src2, timm:$dcf, timm:$cond)>;
@@ -152,5 +152,5 @@ def : Pat<(X86ctestpat GR16:$src1, imm:$src2, timm:$dcf, timm:$cond),
           (CTEST16ri GR16:$src1, imm:$src2, timm:$dcf, timm:$cond)>;
 def : Pat<(X86ctestpat GR32:$src1, imm:$src2, timm:$dcf, timm:$cond),
           (CTEST32ri GR32:$src1, imm:$src2, timm:$dcf, timm:$cond)>;
-def : Pat<(X86ctestpat GR64:$src1, imm:$src2, timm:$dcf, timm:$cond),
-          (CTEST64ri32 GR64:$src1, imm:$src2, timm:$dcf, timm:$cond)>;
+def : Pat<(X86ctestpat GR64:$src1, i64immSExt32_su:$src2, timm:$dcf, timm:$cond),
+          (CTEST64ri32 GR64:$src1, i64immSExt32_su:$src2, timm:$dcf, timm:$cond)>;

diff  --git a/llvm/test/CodeGen/X86/apx/ccmp.ll b/llvm/test/CodeGen/X86/apx/ccmp.ll
index 34138bf88311b..7bd8aeea8863b 100644
--- a/llvm/test/CodeGen/X86/apx/ccmp.ll
+++ b/llvm/test/CodeGen/X86/apx/ccmp.ll
@@ -1258,8 +1258,9 @@ define void @ccmp64ri64(i64 noundef %a, i64 noundef %b, i64 noundef %c) {
 ; CHECK-LABEL: ccmp64ri64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    cmpq %rdx, %rdi # encoding: [0x48,0x39,0xd7]
-; CHECK-NEXT:    ccmpbeq {dfv=zf} $9992147483646, %rsi # encoding: [0x62,0xf4,0x94,0x06,0x81,0xfe,0xfe,0xbb,0x66,0x7a]
+; CHECK-NEXT:    movabsq $9992147483646, %rax # encoding: [0x48,0xb8,0xfe,0xbb,0x66,0x7a,0x16,0x09,0x00,0x00]
 ; CHECK-NEXT:    # imm = 0x9167A66BBFE
+; CHECK-NEXT:    ccmpbeq {dfv=zf} %rax, %rsi # encoding: [0x62,0xf4,0x94,0x06,0x39,0xc6]
 ; CHECK-NEXT:    jg .LBB30_1 # encoding: [0x7f,A]
 ; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB30_1-1, kind: FK_PCRel_1
 ; CHECK-NEXT:  # %bb.2: # %if.then
@@ -1273,8 +1274,9 @@ define void @ccmp64ri64(i64 noundef %a, i64 noundef %b, i64 noundef %c) {
 ; NDD-LABEL: ccmp64ri64:
 ; NDD:       # %bb.0: # %entry
 ; NDD-NEXT:    cmpq %rdx, %rdi # encoding: [0x48,0x39,0xd7]
-; NDD-NEXT:    ccmpbeq {dfv=zf} $9992147483646, %rsi # encoding: [0x62,0xf4,0x94,0x06,0x81,0xfe,0xfe,0xbb,0x66,0x7a]
+; NDD-NEXT:    movabsq $9992147483646, %rax # encoding: [0x48,0xb8,0xfe,0xbb,0x66,0x7a,0x16,0x09,0x00,0x00]
 ; NDD-NEXT:    # imm = 0x9167A66BBFE
+; NDD-NEXT:    ccmpbeq {dfv=zf} %rax, %rsi # encoding: [0x62,0xf4,0x94,0x06,0x39,0xc6]
 ; NDD-NEXT:    jg .LBB30_1 # encoding: [0x7f,A]
 ; NDD-NEXT:    # fixup A - offset: 1, value: .LBB30_1-1, kind: FK_PCRel_1
 ; NDD-NEXT:  # %bb.2: # %if.then

diff  --git a/llvm/test/CodeGen/X86/apx/ctest.ll b/llvm/test/CodeGen/X86/apx/ctest.ll
index b55a540556d20..4f79b0a999632 100644
--- a/llvm/test/CodeGen/X86/apx/ctest.ll
+++ b/llvm/test/CodeGen/X86/apx/ctest.ll
@@ -901,7 +901,8 @@ define void @ctest64ri64(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: ctest64ri64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    testq %rdi, %rdi
-; CHECK-NEXT:    ctestneq {dfv=zf} $9992147483647, %rsi # imm = 0x9167A66BBFF
+; CHECK-NEXT:    movabsq $9992147483647, %rax # imm = 0x9167A66BBFF
+; CHECK-NEXT:    ctestneq {dfv=zf} %rax, %rsi
 ; CHECK-NEXT:    jne .LBB24_1
 ; CHECK-NEXT:  # %bb.2: # %if.then
 ; CHECK-NEXT:    xorl %eax, %eax
@@ -912,7 +913,8 @@ define void @ctest64ri64(i64 noundef %a, i64 noundef %b) {
 ; NDD-LABEL: ctest64ri64:
 ; NDD:       # %bb.0: # %entry
 ; NDD-NEXT:    testq %rdi, %rdi
-; NDD-NEXT:    ctestneq {dfv=zf} $9992147483647, %rsi # imm = 0x9167A66BBFF
+; NDD-NEXT:    movabsq $9992147483647, %rax # imm = 0x9167A66BBFF
+; NDD-NEXT:    ctestneq {dfv=zf} %rax, %rsi
 ; NDD-NEXT:    jne .LBB24_1
 ; NDD-NEXT:  # %bb.2: # %if.then
 ; NDD-NEXT:    xorl %eax, %eax