[clang] [llvm] [X86][MC] Added support for -msse2avx option in llvm-mc (PR #96860)

via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 11 07:10:53 PDT 2024


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@@ -335,6 +337,31 @@ void X86InstrMappingEmitter::emitND2NonNDTable(
   printTable(Table, "X86ND2NonNDTable", "GET_X86_ND2NONND_TABLE", OS);
 }
 
+void X86InstrMappingEmitter::emitSSE2AVXTable(
+    ArrayRef<const CodeGenInstruction *> Insts, raw_ostream &OS) {
+  std::vector<Entry> Table;
+  for (const CodeGenInstruction *Inst : Insts) {
+    const Record *Rec = Inst->TheDef;
+    StringRef Name = Rec->getName();
+    if (!isInteresting(Rec))
+      continue;
+    auto *NewRec = Records.getDef(Name);
+    if (!NewRec)
+      continue;
+
+    std::string NewName = ("V" + Name).str();
+    // Handle instructions BLENDVPD, BLENDVPS ,PBLENDVB
+    if (Name.ends_with("rm0") || Name.ends_with("rr0"))
+      NewName.back() = 'r';
----------------
JaydeepChauhan14 wrote:

These code is adding below entries in to the table.

**{ X86::BLENDVPDrm0, X86::VBLENDVPDrmr },
{ X86::BLENDVPDrr0, X86::VBLENDVPDrrr },
{ X86::BLENDVPSrm0, X86::VBLENDVPSrmr },
{ X86::BLENDVPSrr0, X86::VBLENDVPSrrr },
{ X86::PBLENDVBrm0, X86::VPBLENDVBrmr },
{ X86::PBLENDVBrr0, X86::VPBLENDVBrrr },**

Problem was, for **BLENDVPDrm0** equivalent AVX entry is **VBLENDVPDrmr** . 
But **AVXRec** contain **VBLENDVPDrm0**, so ```"auto &AVXInst = Target.getInstruction(AVXRec);"``` unable to find 
 correct instruction. And above instructions were missed in table.
So updated last letter BLENDVPDrm0 -> BLENDVPDrmr , so it will be able to search correct AVX instruction VBLENDVPDrmr.

https://github.com/llvm/llvm-project/pull/96860


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