[llvm] [CodeGen][NewPM] Port `machine-block-freq` to new pass manager (PR #98317)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 11 00:18:50 PDT 2024
https://github.com/paperchalice updated https://github.com/llvm/llvm-project/pull/98317
>From d60b5b0b331995f0055d404d8ff7104018197853 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Wed, 10 Jul 2024 21:11:31 +0800
Subject: [PATCH 1/2] [CodeGen][NewPM] Port `machine-block-freq` to new pass
manager - Add `MachineBlockFrequencyAnalysis`. - Add
`MachineBlockFrequencyPrinterPass`. - Use
`MachineBlockFrequencyInfoWrapperPass` in legacy pass manager.
---
.../CodeGen/LazyMachineBlockFrequencyInfo.h | 1 -
.../llvm/CodeGen/MachineBlockFrequencyInfo.h | 63 ++++++++++++++++---
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 4 +-
llvm/lib/CodeGen/BranchFolding.cpp | 4 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 29 ++++-----
llvm/lib/CodeGen/IfConversion.cpp | 5 +-
llvm/lib/CodeGen/InlineSpiller.cpp | 6 +-
.../CodeGen/LazyMachineBlockFrequencyInfo.cpp | 12 ++--
llvm/lib/CodeGen/MIRSampleProfile.cpp | 6 +-
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp | 15 +++--
.../lib/CodeGen/MachineBlockFrequencyInfo.cpp | 62 ++++++++++++++----
llvm/lib/CodeGen/MachineBlockPlacement.cpp | 12 ++--
llvm/lib/CodeGen/MachineCSE.cpp | 6 +-
llvm/lib/CodeGen/MachineFunctionSplitter.cpp | 4 +-
llvm/lib/CodeGen/MachineLICM.cpp | 8 +--
llvm/lib/CodeGen/MachineSink.cpp | 6 +-
llvm/lib/CodeGen/RegAllocBasic.cpp | 10 +--
llvm/lib/CodeGen/RegAllocGreedy.cpp | 6 +-
llvm/lib/CodeGen/RegAllocPBQP.cpp | 6 +-
llvm/lib/CodeGen/ShrinkWrap.cpp | 6 +-
llvm/lib/CodeGen/SpillPlacement.cpp | 4 +-
llvm/lib/CodeGen/StackSlotColoring.cpp | 6 +-
llvm/lib/Passes/PassBuilder.cpp | 1 +
llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp | 4 +-
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 8 +--
.../WebAssembly/WebAssemblyArgumentMove.cpp | 2 +-
.../WebAssembly/WebAssemblyExplicitLocals.cpp | 2 +-
.../WebAssemblyMemIntrinsicResults.cpp | 4 +-
.../WebAssemblyOptimizeLiveIntervals.cpp | 2 +-
.../WebAssembly/WebAssemblyRegColoring.cpp | 6 +-
.../WebAssembly/WebAssemblyRegStackify.cpp | 2 +-
.../WebAssemblySetP2AlignOperands.cpp | 2 +-
llvm/test/CodeGen/X86/machine-block-freq.ll | 44 +++++++++++++
35 files changed, 249 insertions(+), 113 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/machine-block-freq.ll
diff --git a/llvm/include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h b/llvm/include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h
index e5794966ce630..f7e5b0e4f9d2b 100644
--- a/llvm/include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h
+++ b/llvm/include/llvm/CodeGen/LazyMachineBlockFrequencyInfo.h
@@ -69,7 +69,6 @@ class LazyMachineBlockFrequencyInfoPass : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &F) override;
void releaseMemory() override;
- void print(raw_ostream &OS, const Module *M) const override;
};
}
#endif
diff --git a/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h b/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
index 3a85bb4ac9f7d..546a5be317667 100644
--- a/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
@@ -14,6 +14,7 @@
#define LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/Support/BlockFrequency.h"
#include <cstdint>
#include <memory>
@@ -30,29 +31,30 @@ class raw_ostream;
/// MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation
/// to estimate machine basic block frequencies.
-class MachineBlockFrequencyInfo : public MachineFunctionPass {
+class MachineBlockFrequencyInfo {
using ImplType = BlockFrequencyInfoImpl<MachineBasicBlock>;
std::unique_ptr<ImplType> MBFI;
public:
- static char ID;
-
- MachineBlockFrequencyInfo();
+ MachineBlockFrequencyInfo(); // Legacy pass manager only.
explicit MachineBlockFrequencyInfo(MachineFunction &F,
MachineBranchProbabilityInfo &MBPI,
MachineLoopInfo &MLI);
- ~MachineBlockFrequencyInfo() override;
-
- void getAnalysisUsage(AnalysisUsage &AU) const override;
+ MachineBlockFrequencyInfo(MachineBlockFrequencyInfo &&);
+ ~MachineBlockFrequencyInfo();
- bool runOnMachineFunction(MachineFunction &F) override;
+ /// Handle invalidation explicitly.
+ bool invalidate(MachineFunction &F, const PreservedAnalyses &PA,
+ MachineFunctionAnalysisManager::Invalidator &);
/// calculate - compute block frequency info for the given function.
void calculate(const MachineFunction &F,
const MachineBranchProbabilityInfo &MBPI,
const MachineLoopInfo &MLI);
- void releaseMemory() override;
+ void print(raw_ostream &OS);
+
+ void releaseMemory();
/// getblockFreq - Return block frequency. Return 0 if we don't have the
/// information. Please note that initial frequency is equal to 1024. It means
@@ -107,6 +109,49 @@ Printable printBlockFreq(const MachineBlockFrequencyInfo &MBFI,
Printable printBlockFreq(const MachineBlockFrequencyInfo &MBFI,
const MachineBasicBlock &MBB);
+class MachineBlockFrequencyAnalysis
+ : public AnalysisInfoMixin<MachineBlockFrequencyAnalysis> {
+ friend AnalysisInfoMixin<MachineBlockFrequencyAnalysis>;
+ static AnalysisKey Key;
+
+public:
+ using Result = MachineBlockFrequencyInfo;
+
+ Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+};
+
+/// Printer pass for the \c MachineBlockFrequencyInfo results.
+class MachineBlockFrequencyPrinterPass
+ : public PassInfoMixin<MachineBlockFrequencyPrinterPass> {
+ raw_ostream &OS;
+
+public:
+ explicit MachineBlockFrequencyPrinterPass(raw_ostream &OS) : OS(OS) {}
+
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+
+ static bool isRequired() { return true; }
+};
+
+class MachineBlockFrequencyInfoWrapperPass : public MachineFunctionPass {
+ MachineBlockFrequencyInfo MBFI;
+
+public:
+ static char ID;
+
+ MachineBlockFrequencyInfoWrapperPass();
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ bool runOnMachineFunction(MachineFunction &F) override;
+
+ void releaseMemory() override { MBFI.releaseMemory(); }
+
+ MachineBlockFrequencyInfo &getMBFI() { return MBFI; }
+
+ const MachineBlockFrequencyInfo &getMBFI() const { return MBFI; }
+};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index a2dfc17ac46fd..8979fcd95aa9a 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -179,7 +179,7 @@ void initializeMIRAddFSDiscriminatorsPass(PassRegistry &);
void initializeMIRCanonicalizerPass(PassRegistry &);
void initializeMIRNamerPass(PassRegistry &);
void initializeMIRPrintingPassPass(PassRegistry&);
-void initializeMachineBlockFrequencyInfoPass(PassRegistry&);
+void initializeMachineBlockFrequencyInfoWrapperPassPass(PassRegistry &);
void initializeMachineBlockPlacementPass(PassRegistry&);
void initializeMachineBlockPlacementStatsPass(PassRegistry&);
void initializeMachineBranchProbabilityInfoWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index e8d3810670ef9..d5cd8d4a132fc 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -96,6 +96,7 @@ LOOP_PASS("loop-reduce", LoopStrengthReducePass())
// preferably fix the scavenger to not depend on them).
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
+MACHINE_FUNCTION_ANALYSIS("machine-block-freq", MachineBlockFrequencyAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
MachineBranchProbabilityAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-dom-tree", MachineDominatorTreeAnalysis())
@@ -108,7 +109,6 @@ MACHINE_FUNCTION_ANALYSIS("slot-indexes", SlotIndexesAnalysis())
// MACHINE_FUNCTION_ANALYSIS("edge-bundles", EdgeBundlesAnalysis())
// MACHINE_FUNCTION_ANALYSIS("lazy-machine-bfi",
// LazyMachineBlockFrequencyInfoAnalysis())
-// MACHINE_FUNCTION_ANALYSIS("machine-bfi", MachineBlockFrequencyInfoAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-loops", MachineLoopInfoAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-dom-frontier",
// MachineDominanceFrontierAnalysis())
@@ -135,6 +135,8 @@ MACHINE_FUNCTION_PASS("no-op-machine-function", NoOpMachineFunctionPass())
MACHINE_FUNCTION_PASS("print", PrintMIRPass())
MACHINE_FUNCTION_PASS("print<live-intervals>", LiveIntervalsPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("print<live-vars>", LiveVariablesPrinterPass(dbgs()))
+MACHINE_FUNCTION_PASS("print<machine-block-freq>",
+ MachineBlockFrequencyPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("print<machine-branch-prob>",
MachineBranchProbabilityPrinterPass(dbgs()))
MACHINE_FUNCTION_PASS("print<machine-dom-tree>",
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index afe797014095d..c0fc7a2b35ea3 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -98,7 +98,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<ProfileSummaryInfoWrapperPass>();
AU.addRequired<TargetPassConfig>();
@@ -130,7 +130,7 @@ bool BranchFolderPass::runOnMachineFunction(MachineFunction &MF) {
bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
PassConfig->getEnableTailMerge();
MBFIWrapper MBBFreqInfo(
- getAnalysis<MachineBlockFrequencyInfo>());
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
BranchFolder Folder(
EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI(),
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index a30eaae90a5fd..ccd8f76fb4f63 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -71,7 +71,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMIRCanonicalizerPass(Registry);
initializeMIRNamerPass(Registry);
initializeMIRProfileLoaderPassPass(Registry);
- initializeMachineBlockFrequencyInfoPass(Registry);
+ initializeMachineBlockFrequencyInfoWrapperPassPass(Registry);
initializeMachineBlockPlacementPass(Registry);
initializeMachineBlockPlacementStatsPass(Registry);
initializeMachineCFGPrinterPass(Registry);
diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index e067bd8961a23..e386647daa653 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -62,7 +62,7 @@ char RegBankSelect::ID = 0;
INITIALIZE_PASS_BEGIN(RegBankSelect, DEBUG_TYPE,
"Assign register bank of generic virtual registers",
false, false);
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE,
@@ -85,7 +85,7 @@ void RegBankSelect::init(MachineFunction &MF) {
TRI = MF.getSubtarget().getRegisterInfo();
TPC = &getAnalysis<TargetPassConfig>();
if (OptMode != Mode::Fast) {
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
} else {
MBFI = nullptr;
@@ -99,7 +99,7 @@ void RegBankSelect::getAnalysisUsage(AnalysisUsage &AU) const {
if (OptMode != Mode::Fast) {
// We could preserve the information from these two analysis but
// the APIs do not allow to do so yet.
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
}
AU.addRequired<TargetPassConfig>();
@@ -919,19 +919,19 @@ bool RegBankSelect::InstrInsertPoint::isSplit() const {
uint64_t RegBankSelect::InstrInsertPoint::frequency(const Pass &P) const {
// Even if we need to split, because we insert between terminators,
// this split has actually the same frequency as the instruction.
- const MachineBlockFrequencyInfo *MBFI =
- P.getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
- if (!MBFI)
+ const auto *MBFIWrapper =
+ P.getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
+ if (!MBFIWrapper)
return 1;
- return MBFI->getBlockFreq(Instr.getParent()).getFrequency();
+ return MBFIWrapper->getMBFI().getBlockFreq(Instr.getParent()).getFrequency();
}
uint64_t RegBankSelect::MBBInsertPoint::frequency(const Pass &P) const {
- const MachineBlockFrequencyInfo *MBFI =
- P.getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
- if (!MBFI)
+ const auto *MBFIWrapper =
+ P.getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
+ if (!MBFIWrapper)
return 1;
- return MBFI->getBlockFreq(&MBB).getFrequency();
+ return MBFIWrapper->getMBFI().getBlockFreq(&MBB).getFrequency();
}
void RegBankSelect::EdgeInsertPoint::materialize() {
@@ -948,10 +948,11 @@ void RegBankSelect::EdgeInsertPoint::materialize() {
}
uint64_t RegBankSelect::EdgeInsertPoint::frequency(const Pass &P) const {
- const MachineBlockFrequencyInfo *MBFI =
- P.getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
- if (!MBFI)
+ const auto *MBFIWrapper =
+ P.getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
+ if (!MBFIWrapper)
return 1;
+ const auto *MBFI = &MBFIWrapper->getMBFI();
if (WasMaterialized)
return MBFI->getBlockFreq(DstOrSplit).getFrequency();
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 02cb95c5d7664..f3789569b78fb 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -209,7 +209,7 @@ namespace {
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<ProfileSummaryInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
@@ -444,7 +444,8 @@ bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
TLI = ST.getTargetLowering();
TII = ST.getInstrInfo();
TRI = ST.getRegisterInfo();
- MBFIWrapper MBFI(getAnalysis<MachineBlockFrequencyInfo>());
+ MBFIWrapper MBFI(
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
ProfileSummaryInfo *PSI =
&getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
diff --git a/llvm/lib/CodeGen/InlineSpiller.cpp b/llvm/lib/CodeGen/InlineSpiller.cpp
index 6abbf8b6d7e0a..81ae805d64e1e 100644
--- a/llvm/lib/CodeGen/InlineSpiller.cpp
+++ b/llvm/lib/CodeGen/InlineSpiller.cpp
@@ -136,7 +136,8 @@ class HoistSpillHelper : private LiveRangeEdit::Delegate {
MDT(pass.getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()),
VRM(vrm), MRI(mf.getRegInfo()), TII(*mf.getSubtarget().getInstrInfo()),
TRI(*mf.getSubtarget().getRegisterInfo()),
- MBFI(pass.getAnalysis<MachineBlockFrequencyInfo>()),
+ MBFI(
+ pass.getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()),
IPA(LIS, mf.getNumBlockIDs()) {}
void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
@@ -193,7 +194,8 @@ class InlineSpiller : public Spiller {
MDT(Pass.getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree()),
VRM(VRM), MRI(MF.getRegInfo()), TII(*MF.getSubtarget().getInstrInfo()),
TRI(*MF.getSubtarget().getRegisterInfo()),
- MBFI(Pass.getAnalysis<MachineBlockFrequencyInfo>()),
+ MBFI(
+ Pass.getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()),
HSpiller(Pass, MF, VRM), VRAI(VRAI) {}
void spill(LiveRangeEdit &) override;
diff --git a/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp b/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
index caaaf7e466f28..6fd84646009be 100644
--- a/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
+++ b/llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
@@ -36,11 +36,6 @@ LazyMachineBlockFrequencyInfoPass::LazyMachineBlockFrequencyInfoPass()
*PassRegistry::getPassRegistry());
}
-void LazyMachineBlockFrequencyInfoPass::print(raw_ostream &OS,
- const Module *M) const {
- getBFI().print(OS, M);
-}
-
void LazyMachineBlockFrequencyInfoPass::getAnalysisUsage(
AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
@@ -56,10 +51,11 @@ void LazyMachineBlockFrequencyInfoPass::releaseMemory() {
MachineBlockFrequencyInfo &
LazyMachineBlockFrequencyInfoPass::calculateIfNotAvailable() const {
- auto *MBFI = getAnalysisIfAvailable<MachineBlockFrequencyInfo>();
- if (MBFI) {
+ auto *MBFIWrapper =
+ getAnalysisIfAvailable<MachineBlockFrequencyInfoWrapperPass>();
+ if (MBFIWrapper) {
LLVM_DEBUG(dbgs() << "MachineBlockFrequencyInfo is available\n");
- return *MBFI;
+ return MBFIWrapper->getMBFI();
}
auto &MBPI = getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
diff --git a/llvm/lib/CodeGen/MIRSampleProfile.cpp b/llvm/lib/CodeGen/MIRSampleProfile.cpp
index b77d8aabe029a..ce82f280c1c53 100644
--- a/llvm/lib/CodeGen/MIRSampleProfile.cpp
+++ b/llvm/lib/CodeGen/MIRSampleProfile.cpp
@@ -69,7 +69,7 @@ char MIRProfileLoaderPass::ID = 0;
INITIALIZE_PASS_BEGIN(MIRProfileLoaderPass, DEBUG_TYPE,
"Load MIR Sample Profile",
/* cfg = */ false, /* is_analysis = */ false)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
@@ -363,7 +363,7 @@ bool MIRProfileLoaderPass::runOnMachineFunction(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "MIRProfileLoader pass working on Func: "
<< MF.getFunction().getName() << "\n");
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
MIRSampleLoader->setInitVals(
&getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree(),
&getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree(),
@@ -401,7 +401,7 @@ bool MIRProfileLoaderPass::doInitialization(Module &M) {
void MIRProfileLoaderPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
AU.addRequiredTransitive<MachineLoopInfoWrapperPass>();
diff --git a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
index 7f90457d720b4..4f0fab8e58bf8 100644
--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
@@ -110,7 +110,7 @@ class RegAllocScoring : public MachineFunctionPass {
AU.setPreservesAll();
AU.addRequired<RegAllocEvictionAdvisorAnalysis>();
AU.addRequired<RegAllocPriorityAdvisorAnalysis>();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -388,7 +388,7 @@ class ReleaseModeEvictionAdvisorAnalysis final
std::vector<TensorSpec> InputFeatures;
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
}
@@ -406,7 +406,8 @@ class ReleaseModeEvictionAdvisorAnalysis final
InteractiveChannelBaseName + ".in");
}
return std::make_unique<MLEvictAdvisor>(
- MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
+ MF, RA, Runner.get(),
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI(),
getAnalysis<MachineLoopInfoWrapperPass>().getLI());
}
std::unique_ptr<MLModelRunner> Runner;
@@ -495,7 +496,7 @@ class DevelopmentModeEvictionAdvisorAnalysis final
std::vector<TensorSpec> TrainingInputFeatures;
void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
}
@@ -544,7 +545,8 @@ class DevelopmentModeEvictionAdvisorAnalysis final
if (Log)
Log->switchContext(MF.getName());
return std::make_unique<DevelopmentModeEvictAdvisor>(
- MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
+ MF, RA, Runner.get(),
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI(),
getAnalysis<MachineLoopInfoWrapperPass>().getLI(), Log.get());
}
@@ -1139,7 +1141,8 @@ bool RegAllocScoring::runOnMachineFunction(MachineFunction &MF) {
auto GetReward = [&]() {
if (!CachedReward)
CachedReward = static_cast<float>(
- calculateRegAllocScore(MF, getAnalysis<MachineBlockFrequencyInfo>())
+ calculateRegAllocScore(
+ MF, getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI())
.getScore());
return *CachedReward;
};
diff --git a/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp b/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
index 5c053a4f1cdb8..9daacfd399787 100644
--- a/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
+++ b/llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
@@ -161,30 +161,67 @@ struct DOTGraphTraits<MachineBlockFrequencyInfo *>
} // end namespace llvm
-INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfo, DEBUG_TYPE,
+AnalysisKey MachineBlockFrequencyAnalysis::Key;
+
+MachineBlockFrequencyAnalysis::Result
+MachineBlockFrequencyAnalysis::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &MBPI = MFAM.getResult<MachineBranchProbabilityAnalysis>(MF);
+ auto &MLI = MFAM.getResult<MachineLoopAnalysis>(MF);
+ return Result(MF, MBPI, MLI);
+}
+
+PreservedAnalyses
+MachineBlockFrequencyPrinterPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &MBFI = MFAM.getResult<MachineBlockFrequencyAnalysis>(MF);
+ OS << "Machine block frequency for machine function: " << MF.getName()
+ << '\n';
+ MBFI.print(OS);
+ return PreservedAnalyses::all();
+}
+
+INITIALIZE_PASS_BEGIN(MachineBlockFrequencyInfoWrapperPass, DEBUG_TYPE,
"Machine Block Frequency Analysis", true, true)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
-INITIALIZE_PASS_END(MachineBlockFrequencyInfo, DEBUG_TYPE,
+INITIALIZE_PASS_END(MachineBlockFrequencyInfoWrapperPass, DEBUG_TYPE,
"Machine Block Frequency Analysis", true, true)
-char MachineBlockFrequencyInfo::ID = 0;
+char MachineBlockFrequencyInfoWrapperPass::ID = 0;
-MachineBlockFrequencyInfo::MachineBlockFrequencyInfo()
+MachineBlockFrequencyInfoWrapperPass::MachineBlockFrequencyInfoWrapperPass()
: MachineFunctionPass(ID) {
- initializeMachineBlockFrequencyInfoPass(*PassRegistry::getPassRegistry());
+ initializeMachineBlockFrequencyInfoWrapperPassPass(
+ *PassRegistry::getPassRegistry());
}
+MachineBlockFrequencyInfo::MachineBlockFrequencyInfo() = default;
+
MachineBlockFrequencyInfo::MachineBlockFrequencyInfo(
- MachineFunction &F,
- MachineBranchProbabilityInfo &MBPI,
- MachineLoopInfo &MLI) : MachineFunctionPass(ID) {
+ MachineBlockFrequencyInfo &&) = default;
+
+MachineBlockFrequencyInfo::MachineBlockFrequencyInfo(
+ MachineFunction &F, MachineBranchProbabilityInfo &MBPI,
+ MachineLoopInfo &MLI) {
calculate(F, MBPI, MLI);
}
MachineBlockFrequencyInfo::~MachineBlockFrequencyInfo() = default;
-void MachineBlockFrequencyInfo::getAnalysisUsage(AnalysisUsage &AU) const {
+bool MachineBlockFrequencyInfo::invalidate(
+ MachineFunction &MF, const PreservedAnalyses &PA,
+ MachineFunctionAnalysisManager::Invalidator &) {
+ // Check whether the analysis, all analyses on machine functions, or the
+ // machine function's CFG have been preserved.
+ auto PAC = PA.getChecker<MachineBlockFrequencyAnalysis>();
+ return !PAC.preserved() &&
+ !PAC.preservedSet<AllAnalysesOn<MachineFunction>>() &&
+ !PAC.preservedSet<CFGAnalyses>();
+}
+
+void MachineBlockFrequencyInfoWrapperPass::getAnalysisUsage(
+ AnalysisUsage &AU) const {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
AU.setPreservesAll();
@@ -207,14 +244,17 @@ void MachineBlockFrequencyInfo::calculate(
}
}
-bool MachineBlockFrequencyInfo::runOnMachineFunction(MachineFunction &F) {
+bool MachineBlockFrequencyInfoWrapperPass::runOnMachineFunction(
+ MachineFunction &F) {
MachineBranchProbabilityInfo &MBPI =
getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
MachineLoopInfo &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
- calculate(F, MBPI, MLI);
+ MBFI.calculate(F, MBPI, MLI);
return false;
}
+void MachineBlockFrequencyInfo::print(raw_ostream &OS) { MBFI->print(OS); }
+
void MachineBlockFrequencyInfo::releaseMemory() { MBFI.reset(); }
/// Pop up a ghostview window with the current block frequency propagation
diff --git a/llvm/lib/CodeGen/MachineBlockPlacement.cpp b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
index 14e01265862f9..4c864ca15ccc5 100644
--- a/llvm/lib/CodeGen/MachineBlockPlacement.cpp
+++ b/llvm/lib/CodeGen/MachineBlockPlacement.cpp
@@ -609,7 +609,7 @@ class MachineBlockPlacement : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
if (TailDupPlacement)
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
@@ -628,7 +628,7 @@ char &llvm::MachineBlockPlacementID = MachineBlockPlacement::ID;
INITIALIZE_PASS_BEGIN(MachineBlockPlacement, DEBUG_TYPE,
"Branch Probability Basic Block Placement", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
@@ -3427,7 +3427,7 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
F = &MF;
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
MBFI = std::make_unique<MBFIWrapper>(
- getAnalysis<MachineBlockFrequencyInfo>());
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
TII = MF.getSubtarget().getInstrInfo();
TLI = MF.getSubtarget().getTargetLowering();
@@ -3727,7 +3727,7 @@ class MachineBlockPlacementStats : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -3742,7 +3742,7 @@ char &llvm::MachineBlockPlacementStatsID = MachineBlockPlacementStats::ID;
INITIALIZE_PASS_BEGIN(MachineBlockPlacementStats, "block-placement-stats",
"Basic Block Placement Stats", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_END(MachineBlockPlacementStats, "block-placement-stats",
"Basic Block Placement Stats", false, false)
@@ -3755,7 +3755,7 @@ bool MachineBlockPlacementStats::runOnMachineFunction(MachineFunction &F) {
return false;
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
for (MachineBasicBlock &MBB : F) {
BlockFrequency BlockFreq = MBFI->getBlockFreq(&MBB);
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp
index 4e6101f875589..4eceb0c16359e 100644
--- a/llvm/lib/CodeGen/MachineCSE.cpp
+++ b/llvm/lib/CodeGen/MachineCSE.cpp
@@ -94,8 +94,8 @@ namespace {
AU.addPreservedID(MachineLoopInfoID);
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
}
MachineFunctionProperties getRequiredProperties() const override {
@@ -944,7 +944,7 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
DT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
LookAheadLimit = TII->getMachineCSELookAheadLimit();
bool ChangedPRE, ChangedCSE;
ChangedPRE = PerformSimplePRE(DT);
diff --git a/llvm/lib/CodeGen/MachineFunctionSplitter.cpp b/llvm/lib/CodeGen/MachineFunctionSplitter.cpp
index 0ddd945896992..edb7a13f44872 100644
--- a/llvm/lib/CodeGen/MachineFunctionSplitter.cpp
+++ b/llvm/lib/CodeGen/MachineFunctionSplitter.cpp
@@ -150,7 +150,7 @@ bool MachineFunctionSplitter::runOnMachineFunction(MachineFunction &MF) {
MachineBlockFrequencyInfo *MBFI = nullptr;
ProfileSummaryInfo *PSI = nullptr;
if (UseProfileData) {
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
// If we don't have a good profile (sample profile is not deemed
// as a "good profile") and the function is not hot, then early
@@ -200,7 +200,7 @@ bool MachineFunctionSplitter::runOnMachineFunction(MachineFunction &MF) {
void MachineFunctionSplitter::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<MachineModuleInfoWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<ProfileSummaryInfoWrapperPass>();
}
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index 93b160eeca976..60f7f7e865abf 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -190,7 +190,7 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineLoopInfoWrapperPass>();
if (DisableHoistingToHotterBlocks != UseBFI::None)
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<AAResultsWrapperPass>();
AU.addPreserved<MachineLoopInfoWrapperPass>();
@@ -323,7 +323,7 @@ char &llvm::EarlyMachineLICMID = EarlyMachineLICM::ID;
INITIALIZE_PASS_BEGIN(MachineLICM, DEBUG_TYPE,
"Machine Loop Invariant Code Motion", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(MachineLICM, DEBUG_TYPE,
@@ -332,7 +332,7 @@ INITIALIZE_PASS_END(MachineLICM, DEBUG_TYPE,
INITIALIZE_PASS_BEGIN(EarlyMachineLICM, "early-machinelicm",
"Early Machine Loop Invariant Code Motion", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(EarlyMachineLICM, "early-machinelicm",
@@ -372,7 +372,7 @@ bool MachineLICMBase::runOnMachineFunction(MachineFunction &MF) {
// Get our Loop information...
if (DisableHoistingToHotterBlocks != UseBFI::None)
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
DT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index bbc5ab13a0cd3..8409c95f0ec72 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -199,7 +199,7 @@ namespace {
AU.addPreserved<MachineCycleInfoWrapperPass>();
AU.addPreserved<MachineLoopInfoWrapperPass>();
if (UseBlockFreqInfo)
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<TargetPassConfig>();
}
@@ -722,7 +722,9 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
DT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
PDT = &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
CI = &getAnalysis<MachineCycleInfoWrapperPass>().getCycleInfo();
- MBFI = UseBlockFreqInfo ? &getAnalysis<MachineBlockFrequencyInfo>() : nullptr;
+ MBFI = UseBlockFreqInfo
+ ? &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()
+ : nullptr;
MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
RegClassInfo.runOnMachineFunction(MF);
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index 544bc98d770f2..e78a447969fb2 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -184,8 +184,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveDebugVariables>();
AU.addRequired<LiveStacks>();
AU.addPreserved<LiveStacks>();
- AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequiredID(MachineDominatorsID);
AU.addPreservedID(MachineDominatorsID);
AU.addRequired<MachineLoopInfoWrapperPass>();
@@ -312,9 +312,9 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
RegAllocBase::init(getAnalysis<VirtRegMap>(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
getAnalysis<LiveRegMatrix>());
- VirtRegAuxInfo VRAI(*MF, *LIS, *VRM,
- getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
- getAnalysis<MachineBlockFrequencyInfo>());
+ VirtRegAuxInfo VRAI(
+ *MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
VRAI.calculateSpillWeightsAndHints();
SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM, VRAI));
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 2006cdaed51f7..048b855058328 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -203,8 +203,8 @@ RAGreedy::RAGreedy(RegClassFilterFunc F):
void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
- AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
AU.addRequired<SlotIndexesWrapperPass>();
@@ -2728,7 +2728,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
// Renumber to get accurate and consistent results from
// SlotIndexes::getApproxInstrDistance.
Indexes->packIndexes();
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
DomTree = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
Loops = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp
index 88e91390a4c59..e6f28d6af29fa 100644
--- a/llvm/lib/CodeGen/RegAllocPBQP.cpp
+++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp
@@ -553,8 +553,8 @@ void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
au.addRequiredID(*customPassID);
au.addRequired<LiveStacks>();
au.addPreserved<LiveStacks>();
- au.addRequired<MachineBlockFrequencyInfo>();
- au.addPreserved<MachineBlockFrequencyInfo>();
+ au.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ au.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
au.addRequired<MachineLoopInfoWrapperPass>();
au.addPreserved<MachineLoopInfoWrapperPass>();
au.addRequired<MachineDominatorTreeWrapperPass>();
@@ -793,7 +793,7 @@ void RegAllocPBQP::postOptimization(Spiller &VRegSpiller, LiveIntervals &LIS) {
bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
LiveIntervals &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
MachineBlockFrequencyInfo &MBFI =
- getAnalysis<MachineBlockFrequencyInfo>();
+ getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
VirtRegMap &VRM = getAnalysis<VirtRegMap>();
diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp
index 28b2beceb2ddb..239572bf773e8 100644
--- a/llvm/lib/CodeGen/ShrinkWrap.cpp
+++ b/llvm/lib/CodeGen/ShrinkWrap.cpp
@@ -229,7 +229,7 @@ class ShrinkWrap : public MachineFunctionPass {
MPDT = &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
Save = nullptr;
Restore = nullptr;
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
EntryFreq = MBFI->getEntryFreq();
@@ -261,7 +261,7 @@ class ShrinkWrap : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
AU.addRequired<MachineLoopInfoWrapperPass>();
@@ -288,7 +288,7 @@ char ShrinkWrap::ID = 0;
char &llvm::ShrinkWrapID = ShrinkWrap::ID;
INITIALIZE_PASS_BEGIN(ShrinkWrap, DEBUG_TYPE, "Shrink Wrap Pass", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
diff --git a/llvm/lib/CodeGen/SpillPlacement.cpp b/llvm/lib/CodeGen/SpillPlacement.cpp
index cdb8099e354bb..9f91ee4934159 100644
--- a/llvm/lib/CodeGen/SpillPlacement.cpp
+++ b/llvm/lib/CodeGen/SpillPlacement.cpp
@@ -56,7 +56,7 @@ INITIALIZE_PASS_END(SpillPlacement, DEBUG_TYPE,
void SpillPlacement::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequiredTransitive<EdgeBundles>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -200,7 +200,7 @@ bool SpillPlacement::runOnMachineFunction(MachineFunction &mf) {
// Compute total ingoing and outgoing block frequencies for all bundles.
BlockFrequencies.resize(mf.getNumBlockIDs());
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
setThreshold(MBFI->getEntryFreq());
for (auto &I : mf) {
unsigned Num = I.getNumber();
diff --git a/llvm/lib/CodeGen/StackSlotColoring.cpp b/llvm/lib/CodeGen/StackSlotColoring.cpp
index 1118287352d3d..638ae51bc7334 100644
--- a/llvm/lib/CodeGen/StackSlotColoring.cpp
+++ b/llvm/lib/CodeGen/StackSlotColoring.cpp
@@ -151,8 +151,8 @@ namespace {
AU.addRequired<SlotIndexesWrapperPass>();
AU.addPreserved<SlotIndexesWrapperPass>();
AU.addRequired<LiveStacks>();
- AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreservedID(MachineDominatorsID);
// In some Target's pipeline, register allocation (RA) might be
@@ -527,7 +527,7 @@ bool StackSlotColoring::runOnMachineFunction(MachineFunction &MF) {
MFI = &MF.getFrameInfo();
TII = MF.getSubtarget().getInstrInfo();
LS = &getAnalysis<LiveStacks>();
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
Indexes = &getAnalysis<SlotIndexesWrapperPass>().getSI();
bool Changed = false;
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 219e8b75450e2..d4eca4a48e55d 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -95,6 +95,7 @@
#include "llvm/CodeGen/LocalStackSlotAllocation.h"
#include "llvm/CodeGen/LowerEmuTLS.h"
#include "llvm/CodeGen/MIRPrinter.h"
+#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
diff --git a/llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp b/llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
index 6aa95ff6fd8f5..22ecbc65edc63 100644
--- a/llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonLoopAlign.cpp
@@ -75,7 +75,7 @@ class HexagonLoopAlign : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -150,7 +150,7 @@ bool HexagonLoopAlign::attemptToBalignSmallLoop(MachineFunction &MF,
const MachineBranchProbabilityInfo *MBPI =
&getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
const MachineBlockFrequencyInfo *MBFI =
- &getAnalysis<MachineBlockFrequencyInfo>();
+ &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
// Compute frequency of back edge,
BlockFrequency BlockFreq = MBFI->getBlockFreq(&MBB);
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index fa29ccbdf4c1f..535a54a1a9a3c 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -158,11 +158,11 @@ struct PPCMIPeephole : public MachineFunctionPass {
AU.addRequired<LiveVariablesWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<MachinePostDominatorTreeWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreserved<LiveVariablesWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachinePostDominatorTreeWrapperPass>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -202,7 +202,7 @@ void PPCMIPeephole::initialize(MachineFunction &MFParm) {
MRI = &MF->getRegInfo();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
MPDT = &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
- MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
+ MBFI = &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
LV = &getAnalysis<LiveVariablesWrapperPass>().getLV();
EntryFreq = MBFI->getEntryFreq();
TII = MF->getSubtarget<PPCSubtarget>().getInstrInfo();
@@ -2031,7 +2031,7 @@ bool PPCMIPeephole::combineSEXTAndSHL(MachineInstr &MI,
INITIALIZE_PASS_BEGIN(PPCMIPeephole, DEBUG_TYPE,
"PowerPC MI Peephole Optimization", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfo)
+INITIALIZE_PASS_DEPENDENCY(MachineBlockFrequencyInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LiveVariablesWrapperPass)
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
index 02f5cc6da77ca..8d46478077c4d 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
@@ -49,7 +49,7 @@ class WebAssemblyArgumentMove final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
index 3c6a29311a10e..d60b59e73b462 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
@@ -39,7 +39,7 @@ class WebAssemblyExplicitLocals final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
index 120e350ab272a..2f861cae69598 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
@@ -54,8 +54,8 @@ class WebAssemblyMemIntrinsicResults final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addPreserved<MachineDominatorTreeWrapperPass>();
AU.addRequired<LiveIntervalsWrapperPass>();
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
index 22213ccc58991..b59a3d85e3025 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
@@ -41,7 +41,7 @@ class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<LiveIntervalsWrapperPass>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreserved<SlotIndexesWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
AU.addPreservedID(LiveVariablesID);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
index 34aa679e53081..8a74d77e369f6 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
@@ -41,8 +41,8 @@ class WebAssemblyRegColoring final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<LiveIntervalsWrapperPass>();
- AU.addRequired<MachineBlockFrequencyInfo>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -234,7 +234,7 @@ bool WebAssemblyRegColoring::runOnMachineFunction(MachineFunction &MF) {
MachineRegisterInfo *MRI = &MF.getRegInfo();
LiveIntervals *Liveness = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
const MachineBlockFrequencyInfo *MBFI =
- &getAnalysis<MachineBlockFrequencyInfo>();
+ &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
// We don't preserve SSA form.
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
index 17e166c3e32b5..658ee3bb7f24f 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
@@ -51,7 +51,7 @@ class WebAssemblyRegStackify final : public MachineFunctionPass {
AU.setPreservesCFG();
AU.addRequired<MachineDominatorTreeWrapperPass>();
AU.addRequired<LiveIntervalsWrapperPass>();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreserved<SlotIndexesWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
AU.addPreservedID(LiveVariablesID);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp b/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
index a453e7388e274..50bde91c9e02f 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
@@ -36,7 +36,7 @@ class WebAssemblySetP2AlignOperands final : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
- AU.addPreserved<MachineBlockFrequencyInfo>();
+ AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>();
AU.addPreservedID(MachineDominatorsID);
MachineFunctionPass::getAnalysisUsage(AU);
}
diff --git a/llvm/test/CodeGen/X86/machine-block-freq.ll b/llvm/test/CodeGen/X86/machine-block-freq.ll
new file mode 100644
index 0000000000000..061630384c92a
--- /dev/null
+++ b/llvm/test/CodeGen/X86/machine-block-freq.ll
@@ -0,0 +1,44 @@
+; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=x86-isel %s -o - | llc --passes='print<machine-block-freq>' -x mir -o - 2>&1 | FileCheck %s
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @foo(i32 noundef %0) #0 {
+ %2 = alloca i32, align 4
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ store i32 %0, ptr %2, align 4
+ store i32 0, ptr %3, align 4
+ store i32 0, ptr %4, align 4
+ br label %5
+
+5: ; preds = %13, %1
+ %6 = load i32, ptr %4, align 4
+ %7 = load i32, ptr %2, align 4
+ %8 = icmp ne i32 %6, %7
+ br i1 %8, label %9, label %16
+
+9: ; preds = %5
+ %10 = load i32, ptr %4, align 4
+ %11 = load i32, ptr %3, align 4
+ %12 = add nsw i32 %11, %10
+ store i32 %12, ptr %3, align 4
+ br label %13
+
+13: ; preds = %9
+ %14 = load i32, ptr %4, align 4
+ %15 = add nsw i32 %14, 1
+ store i32 %15, ptr %4, align 4
+ br label %5, !llvm.loop !1
+
+16: ; preds = %5
+ %17 = load i32, ptr %3, align 4
+ %18 = load i32, ptr %2, align 4
+ %19 = add nsw i32 %17, %18
+ ret i32 %19
+}
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.mustprogress"}
+
+; CHECK: block-frequency-info: foo
+; CHECK: - BB0[]: float = 1.0
+; CHECK: - BB1[]: float = 32.0
>From 6f3c97efd00d5227038621e5650a396cdce58236 Mon Sep 17 00:00:00 2001
From: PaperChalice <liujunchang97 at outlook.com>
Date: Thu, 11 Jul 2024 15:18:29 +0800
Subject: [PATCH 2/2] Use a simple test
---
llvm/test/CodeGen/X86/machine-block-freq.ll | 44 -------------------
llvm/test/CodeGen/X86/machine-block-freq.mir | 45 ++++++++++++++++++++
2 files changed, 45 insertions(+), 44 deletions(-)
delete mode 100644 llvm/test/CodeGen/X86/machine-block-freq.ll
create mode 100644 llvm/test/CodeGen/X86/machine-block-freq.mir
diff --git a/llvm/test/CodeGen/X86/machine-block-freq.ll b/llvm/test/CodeGen/X86/machine-block-freq.ll
deleted file mode 100644
index 061630384c92a..0000000000000
--- a/llvm/test/CodeGen/X86/machine-block-freq.ll
+++ /dev/null
@@ -1,44 +0,0 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=x86-isel %s -o - | llc --passes='print<machine-block-freq>' -x mir -o - 2>&1 | FileCheck %s
-
-; Function Attrs: noinline nounwind optnone ssp uwtable
-define i32 @foo(i32 noundef %0) #0 {
- %2 = alloca i32, align 4
- %3 = alloca i32, align 4
- %4 = alloca i32, align 4
- store i32 %0, ptr %2, align 4
- store i32 0, ptr %3, align 4
- store i32 0, ptr %4, align 4
- br label %5
-
-5: ; preds = %13, %1
- %6 = load i32, ptr %4, align 4
- %7 = load i32, ptr %2, align 4
- %8 = icmp ne i32 %6, %7
- br i1 %8, label %9, label %16
-
-9: ; preds = %5
- %10 = load i32, ptr %4, align 4
- %11 = load i32, ptr %3, align 4
- %12 = add nsw i32 %11, %10
- store i32 %12, ptr %3, align 4
- br label %13
-
-13: ; preds = %9
- %14 = load i32, ptr %4, align 4
- %15 = add nsw i32 %14, 1
- store i32 %15, ptr %4, align 4
- br label %5, !llvm.loop !1
-
-16: ; preds = %5
- %17 = load i32, ptr %3, align 4
- %18 = load i32, ptr %2, align 4
- %19 = add nsw i32 %17, %18
- ret i32 %19
-}
-
-!0 = distinct !{!0, !1}
-!1 = !{!"llvm.loop.mustprogress"}
-
-; CHECK: block-frequency-info: foo
-; CHECK: - BB0[]: float = 1.0
-; CHECK: - BB1[]: float = 32.0
diff --git a/llvm/test/CodeGen/X86/machine-block-freq.mir b/llvm/test/CodeGen/X86/machine-block-freq.mir
new file mode 100644
index 0000000000000..91e7a7bd2fdd5
--- /dev/null
+++ b/llvm/test/CodeGen/X86/machine-block-freq.mir
@@ -0,0 +1,45 @@
+# RUN: llc --passes='print<machine-block-freq>' -filetype=null 2>&1 %s | FileCheck %s
+
+--- |
+ define i32 @is_odd(i32 noundef %n) {
+ %result = srem i32 %n, 2
+ %is_odd = icmp eq i32 %result, 1
+ br i1 %is_odd, label %odd, label %even
+ odd:
+ ret i32 1
+ even:
+ ret i32 0
+ }
+...
+---
+name: is_odd
+tracksRegLiveness: true
+body: |
+ bb.0 (%ir-block.0):
+ successors: %bb.2(0x40000000), %bb.1(0x40000000)
+ liveins: $edi
+
+ %0:gr32 = COPY $edi
+ %1:gr32 = COPY killed %0
+ %4:gr32 = MOV32ri 2
+ $eax = COPY %1
+ CDQ implicit-def $eax, implicit-def $edx, implicit $eax
+ IDIV32r %4, implicit-def $eax, implicit-def $edx, implicit-def $eflags, implicit $eax, implicit $edx
+ %5:gr32 = COPY $edx
+ CMP32ri %5, 1, implicit-def $eflags
+ JCC_1 %bb.2, 5, implicit $eflags
+
+ bb.1.odd:
+ %7:gr32 = MOV32ri 1
+ $eax = COPY %7
+ RET64 implicit $eax
+
+ bb.2.even:
+ %6:gr32 = MOV32r0 implicit-def $eflags
+ $eax = COPY %6
+ RET64 implicit $eax
+...
+
+# CHECK: block-frequency-info: is_odd
+# CHECK: - BB1[odd]: float = 0.5
+# CHECK: - BB2[even]: float = 0.5
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