[llvm] [MachineCopyPropagation] Detect and fix suboptimal instruction order to enable optimizations (PR #98087)

[Gábor Spaits via llvm-commits]

spaits wrote:

@s-barannikov @qcolombet I would like to ask some questions before I start implementing.

So I have looked at the two existing anti dependency breakers. I found out that currently non of these move around instructions to get rid of anti dependencies.

In our case we must move instructions just renaming is not enough. The reason for this is the place final place of data and the origin of the data can not be changed in some scenarios. For example if the values are coming from calls and passed to calls the calling convention determines where that data must be.

For example the above mir's anti dependency can not be resolved by just renaming.
The data returned from `chain` let's call it `$1` must be in `w1` for the next call.
The data loaded from the stack must be in `w0`. So the desired state can be achieved in two instructions, but to do that we must switch the load and the copy.
```mir
BL @chain
renamable $w8 = LDRWui %stack.0.c, 0 # Here we can't load instantly to w0 because it still holds needed data.
renamable $w1 = COPY $w0 # Putting $1 to it's final place for the call.
$w0 = COPY killed renamable $w8
BL @chain
```

```mir
BL @chain
renamable $w1 = COPY $w0 # Here $1 is at it's final place.
renamable $w8 = LDRWui %stack.0.c, 0 # No anti dep. Now machine-cp can optimize.
$w0 = COPY killed renamable $w8
BL @chain
```

(1) Is it ok if from now on it will also move around instructions?

This dependency breaking stuff is pretty huge. (2) Wouldn't it deserve it's own pass?

Also currently post RA scheduling only happens after machine-cp on arm64 and x86 and doesn't happens at all on riscv. (3)Should I add it for riscv? (4)Is it ok if I add another machine-cp after post RA scheduling?

https://github.com/llvm/llvm-project/pull/98087