[llvm] 3742c2a - [SLP]Use stored signedness after minbitwidth analysis.
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 10 04:13:32 PDT 2024
Author: Alexey Bataev
Date: 2024-07-10T03:58:00-07:00
New Revision: 3742c2a83cd644c47db969b6dd421665695f94da
URL: https://github.com/llvm/llvm-project/commit/3742c2a83cd644c47db969b6dd421665695f94da
DIFF: https://github.com/llvm/llvm-project/commit/3742c2a83cd644c47db969b6dd421665695f94da.diff
LOG: [SLP]Use stored signedness after minbitwidth analysis.
Need to used stored signedness info for the root node instead of
recalculating it after the vectorization, which may lead to a compiler
crash.
Added:
llvm/test/Transforms/SLPVectorizer/X86/const-reduced-vals-resized.ll
Modified:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 1e9dd8c1e2287..19353ffd0081a 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -17476,9 +17476,8 @@ class HorizontalReduction {
// Emit code to correctly handle reused reduced values, if required.
if (OptReusedScalars && !SameScaleFactor) {
- VectorizedRoot =
- emitReusedOps(VectorizedRoot, Builder, V.getRootNodeScalars(),
- SameValuesCounter, TrackedToOrig);
+ VectorizedRoot = emitReusedOps(VectorizedRoot, Builder, V,
+ SameValuesCounter, TrackedToOrig);
}
Value *ReducedSubTree =
@@ -17818,24 +17817,19 @@ class HorizontalReduction {
/// Emits actual operation for the scalar identity values, found during
/// horizontal reduction analysis.
Value *emitReusedOps(Value *VectorizedValue, IRBuilderBase &Builder,
- ArrayRef<Value *> VL,
+ BoUpSLP &R,
const MapVector<Value *, unsigned> &SameValuesCounter,
const DenseMap<Value *, Value *> &TrackedToOrig) {
assert(IsSupportedHorRdxIdentityOp &&
"The optimization of matched scalar identity horizontal reductions "
"must be supported.");
+ ArrayRef<Value *> VL = R.getRootNodeScalars();
auto *VTy = cast<FixedVectorType>(VectorizedValue->getType());
if (VTy->getElementType() != VL.front()->getType()) {
VectorizedValue = Builder.CreateIntCast(
VectorizedValue,
getWidenedType(VL.front()->getType(), VTy->getNumElements()),
- any_of(VL, [&](Value *R) {
- KnownBits Known = computeKnownBits(
- R, cast<Instruction>(ReductionOps.front().front())
- ->getModule()
- ->getDataLayout());
- return !Known.isNonNegative();
- }));
+ R.isSignedMinBitwidthRootNode());
}
switch (RdxKind) {
case RecurKind::Add: {
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/const-reduced-vals-resized.ll b/llvm/test/Transforms/SLPVectorizer/X86/const-reduced-vals-resized.ll
new file mode 100644
index 0000000000000..dc8c1c420bf80
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/const-reduced-vals-resized.ll
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux < %s | FileCheck %s
+
+define i32 @test() {
+; CHECK-LABEL: define i32 @test() {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> zeroinitializer)
+; CHECK-NEXT: ret i32 [[TMP0]]
+;
+entry:
+ %cond = zext i1 false to i32
+ %cond258 = zext i1 false to i32
+ %cond283 = zext i1 false to i32
+ %cond308 = zext i1 false to i32
+ %conv685 = or i32 %cond308, %cond
+ %conv710 = or i32 %conv685, %cond258
+ %conv735 = or i32 %conv710, %cond283
+ %conv791 = or i32 %conv735, %cond
+ ret i32 %conv791
+}
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