[llvm] 5ab755c - [RISCV] Add LiveInterval assertions in insertVSETVLI. NFC
Luke Lau via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 10 02:35:58 PDT 2024
Author: Luke Lau
Date: 2024-07-10T17:35:42+08:00
New Revision: 5ab755c972327b4d2c118db9b694d199a981579f
URL: https://github.com/llvm/llvm-project/commit/5ab755c972327b4d2c118db9b694d199a981579f
DIFF: https://github.com/llvm/llvm-project/commit/5ab755c972327b4d2c118db9b694d199a981579f.diff
LOG: [RISCV] Add LiveInterval assertions in insertVSETVLI. NFC
If we're inserting a vsetvli that uses a register AVL, then the AVL
register should either:
a) Be already live at the vsetvli with the expected value
b) Not be live at the vsetvli, but have exactly one value that can be
extended safely: see #97264
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 67e1b76cd304f..d28f849644d25 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1163,7 +1163,10 @@ void RISCVInsertVSETVLI::insertVSETVLI(MachineBasicBlock &MBB,
// isn't always the case, e.g. PseudoVMV_X_S doesn't have an AVL operand or
// we've taken the AVL from the VL output of another vsetvli.
LiveInterval &LI = LIS->getInterval(AVLReg);
- LIS->extendToIndices(LI, {LIS->getInstructionIndex(*MI).getRegSlot()});
+ SlotIndex SI = LIS->getInstructionIndex(*MI).getRegSlot();
+ assert((LI.liveAt(SI) && LI.getVNInfoAt(SI) == Info.getAVLVNInfo()) ||
+ (!LI.liveAt(SI) && LI.containsOneValue()));
+ LIS->extendToIndices(LI, SI);
}
}
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