[llvm] 8ab19d2 - [RISCV] Add -verify-machineinstrs to RISCVInsertVSETVLI MIR tests. NFC

[Luke Lau via llvm-commits]

Author: Luke Lau
Date: 2024-07-10T16:30:57+08:00
New Revision: 8ab19d2e7094c6816ea4f545eb24c503c79a9673

URL: https://github.com/llvm/llvm-project/commit/8ab19d2e7094c6816ea4f545eb24c503c79a9673
DIFF: https://github.com/llvm/llvm-project/commit/8ab19d2e7094c6816ea4f545eb24c503c79a9673.diff

LOG: [RISCV] Add -verify-machineinstrs to RISCVInsertVSETVLI MIR tests. NFC

Now that we're working with LiveIntervals, make sure that they're correct.

Added: 
    

Modified: 
    llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
    llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
index ee10c9987be49..8956ecd2a8bbf 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc %s -o - -mtriple=riscv64 -mattr=v \
+# RUN: llc %s -o - -mtriple=riscv64 -mattr=v -verify-machineinstrs \
 # RUN:     -run-pass=phi-node-elimination,register-coalescer,riscv-insert-vsetvli | FileCheck %s
 
 --- |

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
index 681b50de5b81c..817bb3a905985 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
@@ -1,6 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc %s -o - -mtriple=riscv64 -mattr=v -run-pass=liveintervals,riscv-insert-vsetvli \
-# RUN:     | FileCheck %s
+# RUN:     -verify-machineinstrs | FileCheck %s
 
 --- |
   source_filename = "vsetvli-insert.ll"