[llvm] [MachineCopyPropagation] Detect and fix suboptimal instruction order to enable optimizations (PR #98087)

[Gábor Spaits via llvm-commits]

spaits wrote:

@qcolombet Yes I agree, that recreating having the code for data dependency analysis twice is a real possibility that wouldn't be good.

My last concern is this, if we resolve this then I am moving the logic:
- post-RA-scheduler seems kind of not stable to me: No major target uses it on any optimization level (x86, arm, riscv). It outright doesn't run on arm and riscv even if I explicitly ask for the pass with the flag that should enable it. I would like to have this optimization available everywhere after a PR merge, since it is simple and useful.

Is post-RA-scheduler stable? How much work it would be to add it to all the targets from at least O3? Is there any historic reason why it is not used anywhere I don't know of and couldn't find? Is it not done yet? It generates wrong or sub-optimal code? (In my case on X86 it was interesting to me that it has just renamed some regs.)

Also mcp's backward propagation has to be copied into post-RA-scheduler if we move logic there.
Shouldn't we just create a really simple data flow analysis library for MIR (that only operates on basic block)? I would check what exactly happens in post-RA-scheduler and create a library that can be used by post-RA-scheduler and machine-cp or other passes that need data flow analysis like stuff too.

This way we could avoid any duplication of both data flow analysis and copy propagation related code. Also if post-RA-scheduler and dependency breakers are experimental (I deduced this from what I experienced) and will probably stay that for some time then I wouldn't want this to be tied to it, since I think the only relation between my the functionality of my patch and post-RA-scheduler is the need for data flow analysis.

https://github.com/llvm/llvm-project/pull/98087