[llvm] c16e378 - [VPlan] Clarify setting Lane in fixPhi (NFCI).

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2024-07-09T13:09:40+01:00
New Revision: c16e37867ca838621ff9233f4d1a58207c3e99db

URL: https://github.com/llvm/llvm-project/commit/c16e37867ca838621ff9233f4d1a58207c3e99db
DIFF: https://github.com/llvm/llvm-project/commit/c16e37867ca838621ff9233f4d1a58207c3e99db.diff

LOG: [VPlan] Clarify setting Lane in fixPhi (NFCI).

Split off from https://github.com/llvm/llvm-project/pull/94760, clarify
as suggested.

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Removed: 
    


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diff  --git a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
index b051f9d5e4a69..d315b637464e9 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
@@ -189,10 +189,10 @@ bool VPRecipeBase::mayHaveSideEffects() const {
 }
 
 void VPLiveOut::fixPhi(VPlan &Plan, VPTransformState &State) {
-  auto Lane = VPLane::getLastLaneForVF(State.VF);
   VPValue *ExitValue = getOperand(0);
-  if (vputils::isUniformAfterVectorization(ExitValue))
-    Lane = VPLane::getFirstLane();
+  auto Lane = vputils::isUniformAfterVectorization(ExitValue)
+                  ? VPLane::getFirstLane()
+                  : VPLane::getLastLaneForVF(State.VF);
   VPBasicBlock *MiddleVPBB =
       cast<VPBasicBlock>(Plan.getVectorLoopRegion()->getSingleSuccessor());
   BasicBlock *MiddleBB = State.CFG.VPBB2IRBB[MiddleVPBB];