[llvm] [RISCV] Expand vp.stride.load to splat of a scalar load. (PR #98140)

[Luke Lau via llvm-commits]

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@@ -155,6 +163,43 @@ bool RISCVCodeGenPrepare::visitIntrinsicInst(IntrinsicInst &I) {
   return true;
 }
 
+bool RISCVCodeGenPrepare::expandVPStrideLoad(IntrinsicInst &II) {
+  if (ST->hasOptimizedZeroStrideLoad())
+    return false;
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lukel97 wrote:

RISCVISelDAGToDAG.cpp will turn a splat of a scalar load back to a zero-strided load anyway if `ST->hasOptimizedZeroStrideLoad()`, I think we might be able to remove this check. The riscv_masked_strided_load lowering that does a splat of a scalar load doesn't seem to check for it anyway.

https://github.com/llvm/llvm-project/pull/98140