[llvm] [RISCV] Emit VP strided loads/stores in RISCVGatherScatterLowering (PR #98111)
Yeting Kuo via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 9 00:47:15 PDT 2024
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@@ -144,9 +144,9 @@ define void @gather_zero_stride(ptr noalias nocapture %A, ptr noalias nocapture
; CHECK-NEXT: vsetvli zero, a3, e8, m1, ta, ma
; CHECK-NEXT: .LBB3_1: # %vector.body
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: lbu a3, 0(a1)
-; CHECK-NEXT: vle8.v v8, (a0)
-; CHECK-NEXT: vadd.vx v8, v8, a3
+; CHECK-NEXT: vlse8.v v8, (a1), zero
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yetingk wrote:
I almost completed it. But I am stuck how to splat with evl=vl for fixed vectors. For scalable vector, I use splat the scalar load by vmv_v_x/vmv_v_f.
https://github.com/llvm/llvm-project/pull/98111
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